Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934844AbbEOPSJ (ORCPT ); Fri, 15 May 2015 11:18:09 -0400 Received: from mail-ig0-f176.google.com ([209.85.213.176]:38031 "EHLO mail-ig0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932529AbbEOPSH convert rfc822-to-8bit (ORCPT ); Fri, 15 May 2015 11:18:07 -0400 MIME-Version: 1.0 In-Reply-To: <874mndlvny.fsf@linaro.org> References: <1431700035-23479-1-git-send-email-alex.bennee@linaro.org> <1431700035-23479-4-git-send-email-alex.bennee@linaro.org> <20150515144423.GA23652@leverpostej> <874mndlvny.fsf@linaro.org> From: Peter Maydell Date: Fri, 15 May 2015 16:17:46 +0100 Message-ID: Subject: Re: [PATCH v4 03/12] KVM: arm64: guest debug, define API headers To: =?UTF-8?B?QWxleCBCZW5uw6ll?= Cc: Mark Rutland , "kvm@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "kvmarm@lists.cs.columbia.edu" , "christoffer.dall@linaro.org" , Marc Zyngier , "agraf@suse.de" , "drjones@redhat.com" , "pbonzini@redhat.com" , "zhichao.huang@linaro.org" , Catalin Marinas , "jan.kiszka@siemens.com" , Will Deacon , open list , "dahi@linux.vnet.ibm.com" , "r65777@freescale.com" , "bp@suse.de" Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1274 Lines: 33 On 15 May 2015 at 16:14, Alex Bennée wrote: > > Mark Rutland writes: > >> On Fri, May 15, 2015 at 03:27:06PM +0100, Alex Bennée wrote: >>> +/* >>> + * See v8 ARM ARM D7.3: Debug Registers >>> + * >>> + * The control registers are architecturally defined as 32 bits but are >>> + * stored as 64 bit values alongside the value registers. This is done >> >> Stale comment? They're stored as __u32 below. > > Gah yes it is. > >> It's possible that the registers could grow in future as happened in the >> case of CLIDR_EL1, so it might be worth treating system registers >> generally as u64 values. > > Really? I mean the existing debug *control* registers have reserved bits > 24-31 so there is space for expansion. Other places in the userspace ABI which deal with sysregs (notably ONE_REG) consistently define them all as 64-bit (which makes sense anyway since the ISA only provides 64-bit accessors to them). "Architecturally 32 bits" only means "top 32 bits reserved". -- PMM -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/