Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1946114AbbEOPmO (ORCPT ); Fri, 15 May 2015 11:42:14 -0400 Received: from static.88-198-71-155.clients.your-server.de ([88.198.71.155]:36480 "EHLO socrates.bennee.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1946094AbbEOPmM (ORCPT ); Fri, 15 May 2015 11:42:12 -0400 References: <1431700035-23479-1-git-send-email-alex.bennee@linaro.org> <1431700035-23479-4-git-send-email-alex.bennee@linaro.org> <20150515144423.GA23652@leverpostej> <874mndlvny.fsf@linaro.org> From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Peter Maydell Cc: Mark Rutland , "kvm\@vger.kernel.org" , "linux-arm-kernel\@lists.infradead.org" , "kvmarm\@lists.cs.columbia.edu" , "christoffer.dall\@linaro.org" , Marc Zyngier , "agraf\@suse.de" , "drjones\@redhat.com" , "pbonzini\@redhat.com" , "zhichao.huang\@linaro.org" , Catalin Marinas , "jan.kiszka\@siemens.com" , Will Deacon , open list , "dahi\@linux.vnet.ibm.com" , "r65777\@freescale.com" , "bp\@suse.de" Subject: Re: [PATCH v4 03/12] KVM: arm64: guest debug, define API headers In-reply-to: Date: Fri, 15 May 2015 16:43:01 +0100 Message-ID: <871tihlud6.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 127.0.0.1 X-SA-Exim-Mail-From: alex.bennee@linaro.org X-SA-Exim-Scanned: No (on socrates.bennee.com); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1638 Lines: 45 Peter Maydell writes: > On 15 May 2015 at 16:14, Alex Bennée wrote: >> >> Mark Rutland writes: >> >>> On Fri, May 15, 2015 at 03:27:06PM +0100, Alex Bennée wrote: >>>> +/* >>>> + * See v8 ARM ARM D7.3: Debug Registers >>>> + * >>>> + * The control registers are architecturally defined as 32 bits but are >>>> + * stored as 64 bit values alongside the value registers. This is done >>> >>> Stale comment? They're stored as __u32 below. >> >> Gah yes it is. >> >>> It's possible that the registers could grow in future as happened in the >>> case of CLIDR_EL1, so it might be worth treating system registers >>> generally as u64 values. >> >> Really? I mean the existing debug *control* registers have reserved bits >> 24-31 so there is space for expansion. > > Other places in the userspace ABI which deal with sysregs (notably > ONE_REG) consistently define them all as 64-bit (which makes sense > anyway since the ISA only provides 64-bit accessors to them). > "Architecturally 32 bits" only means "top 32 bits reserved". Fair enough, I can switch it back. The main reason I had them as all 64 bit before was because of the mapping onto the sys_regs context. If everyone is happy bloating the ABI a little I'm OK with that. It will make the hyp.S macro a little less ugly for one. > > -- PMM -- Alex Bennée -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/