Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1946096AbbEOQQT (ORCPT ); Fri, 15 May 2015 12:16:19 -0400 Received: from static.88-198-71-155.clients.your-server.de ([88.198.71.155]:36597 "EHLO socrates.bennee.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934744AbbEOQQP (ORCPT ); Fri, 15 May 2015 12:16:15 -0400 References: <1431700035-23479-1-git-send-email-alex.bennee@linaro.org> <1431700035-23479-11-git-send-email-alex.bennee@linaro.org> <20150515152346.GB23652@leverpostej> From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Mark Rutland Cc: "kvm\@vger.kernel.org" , "linux-arm-kernel\@lists.infradead.org" , "kvmarm\@lists.cs.columbia.edu" , "christoffer.dall\@linaro.org" , Marc Zyngier , "peter.maydell\@linaro.org" , "agraf\@suse.de" , "drjones\@redhat.com" , "pbonzini\@redhat.com" , "zhichao.huang\@linaro.org" , Lorenzo Pieralisi , Russell King , Jonathan Corbet , Gleb Natapov , "jan.kiszka\@siemens.com" , "open list\:DOCUMENTATION" , Will Deacon , open list , "open list\:ABI\/API" , "dahi\@linux.vnet.ibm.com" , Peter Zijlstra , Catalin Marinas , "r65777\@freescale.com" , "bp\@suse.de" , Ingo Molnar Subject: Re: [PATCH v4 10/12] KVM: arm64: guest debug, HW assisted debug support In-reply-to: <20150515152346.GB23652@leverpostej> Date: Fri, 15 May 2015 17:16:26 +0100 Message-ID: <87y4kpke91.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 127.0.0.1 X-SA-Exim-Mail-From: alex.bennee@linaro.org X-SA-Exim-Scanned: No (on socrates.bennee.com); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2378 Lines: 60 Mark Rutland writes: > Hi Alex, > > On Fri, May 15, 2015 at 03:27:13PM +0100, Alex Bennée wrote: >> This adds support for userspace to control the HW debug registers for >> guest debug. In the debug ioctl we copy the IMPDEF defined number of >> registers into a new register set called host_debug_state. There is now >> a new vcpu parameter called debug_ptr which selects which register set >> is to copied into the real registers when world switch occurs. >> >> I've moved some helper functions into the hw_breakpoint.h header for >> re-use. >> >> As with single step we need to tweak the guest registers to enable the >> exceptions so we need to save and restore those bits. >> >> Two new capabilities have been added to the KVM_EXTENSION ioctl to allow >> userspace to query the number of hardware break and watch points >> available on the host hardware. > > There's the unfortunate possibility that these could vary across cores > in a big.LITTLE system (though we haven't seen that thus far). The > kernel sanity checks should currently explode if such a case is > encountered, but I don't know what we'd do were that to happen. I suspect we would have to disable HW assisted breakpoints or return the lowest common denominator if we can tell which cores we shall every be scheduled on. > > This gets more fun when you consider the context-aware breakpoints are > the highest numbered. So the set of (context-aware) breakpoints might > not intersect across all CPUs. I didn't see a reference to that in the ARM ARM. It seemed to imply any breakpoint could be context aware is .BT was appropriately set and linked to the VR. As it happens the gdb stub interface in QEMU is fairly limited so while I expose the full debug registers I don't think there is currently a way to expose any of the fancy linking/context stuff to the userspace debugger. However I did make the ABI pass full raw values in so this could become a possibility later without having to expand the ABI. > I'm not sure what the best thing to do is w.r.t. exposing that to > userspace. > > Thanks, > Mark. -- Alex Bennée -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/