Date: Fri, 15 May 2015 18:01:14 +0100
From: Mark Rutland <mark.rutland@arm.com>
To: Alex =?utf-8?Q?Benn=C3=A9e?= <alex.bennee@linaro.org>
Cc: "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
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Subject: Re: [PATCH v4 10/12] KVM: arm64: guest debug, HW assisted debug
 support
Message-ID: <20150515170114.GD23652@leverpostej>
References: <1431700035-23479-1-git-send-email-alex.bennee@linaro.org>
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 <20150515152346.GB23652@leverpostej>
 <87y4kpke91.fsf@linaro.org>
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> > This gets more fun when you consider the context-aware breakpoints are
> > the highest numbered. So the set of (context-aware) breakpoints might
> > not intersect across all CPUs.
> 
> I didn't see a reference to that in the ARM ARM. It seemed to imply any
> breakpoint could be context aware is .BT was appropriately set and
> linked to the VR.  

The existence of ID_AA64_DFR0_EL1.CTX_CMPs implies otherwise, though I
haven't dug much deeper.

Thanks,
Mark.
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