Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754637AbbETQ6m (ORCPT ); Wed, 20 May 2015 12:58:42 -0400 Received: from mail-wg0-f50.google.com ([74.125.82.50]:35128 "EHLO mail-wg0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754526AbbETQ6j (ORCPT ); Wed, 20 May 2015 12:58:39 -0400 Message-ID: <555CBD3B.1000809@gmail.com> Date: Wed, 20 May 2015 18:58:35 +0200 From: Sebastian Hesselbarth User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 To: Antoine Tenart CC: zmxu@marvell.com, jszhang@marvell.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] ARM: berlin: add SPI nodes for BG2Q References: <1432126385-27402-1-git-send-email-antoine.tenart@free-electrons.com> In-Reply-To: <1432126385-27402-1-git-send-email-antoine.tenart@free-electrons.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2867 Lines: 110 On 20.05.2015 14:53, Antoine Tenart wrote: > The BG2Q SoC has two SPI controllers. Add the corresponding nodes. > > Signed-off-by: Antoine Tenart > --- > > Based on top of the Berlin clock rework series. > > arch/arm/boot/dts/berlin2q.dtsi | 38 ++++++++++++++++++++++++++++++++++++++ > 1 file changed, 38 insertions(+) > > diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi > index 187d056f7ad2..c25ee86b2bfa 100644 > --- a/arch/arm/boot/dts/berlin2q.dtsi > +++ b/arch/arm/boot/dts/berlin2q.dtsi > @@ -286,6 +286,20 @@ > status = "disabled"; > }; > > + spi0: spi@1c00 { > + compatible = "snps,dw-apb-ssi"; > + reg = <0x1c00 0x100>; > + interrupt-parrent = <&aic>; Antoine, the same question as for the ADC node patch: IIRC you don't have to repeat the interrupt-parent property as long as any node upstream will have it already. > + interrupts = <7>; > + clocks = <&chip_clk CLKID_CFG>; > + pinctrl-0 = <&spi0_pmux>; > + pinctrl-names = "default"; > + #address-cells = <1>; > + #size-cells = <0>; > + num-cs = <4>; > + status = "disabled"; > + }; > + > timer0: timer@2c00 { > compatible = "snps,dw-apb-timer"; > reg = <0x2c00 0x14>; > @@ -383,6 +397,11 @@ > groups = "G7"; > function = "twsi1"; > }; > + > + spi0_pmux: spi0-pmux { > + groups = "G8", "G9", "G10", "G11"; > + function = "spi1"; Hmm, "spi0_pmux" but "spi1" function? > + }; > }; > > chip_rst: reset { > @@ -473,6 +492,20 @@ > }; > }; > > + spi1: spi@5000 { > + compatible = "snps,dw-apb-ssi"; > + reg = <0x6000 0x100>; > + interrupt-parent = <&sic>; > + interrupts = <5>; > + clocks = <&refclk>; > + pinctrl-0 = <&spi1_pmux>; > + pinctrl-names = "default"; > + #address-cells = <1>; > + #size-cells = <0>; > + num-cs = <4>; > + status = "disabled"; > + }; > + > i2c2: i2c@7000 { > compatible = "snps,designware-i2c"; > #address-cells = <1>; > @@ -564,6 +597,11 @@ > groups = "GSM14"; > function = "twsi3"; > }; > + > + spi1_pmux: spi1-pmux { > + groups = "GSM0", "GSM1", "GSM2", "GSM3"; > + function = "spi2"; ditto. I know the internal numbering scheme on BG-SoCs is weird, but it looks like that either you are missing the third SPI or there is only 2 and numbering starts with 1 *sigh* ;) Anyway, the numbering should be consistent with pinctrl function names although I would have preferred to start counting with 0. Sebastian > + }; > }; > }; > > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/