Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755341AbbETV1g (ORCPT ); Wed, 20 May 2015 17:27:36 -0400 Received: from mailuogwhop.emc.com ([168.159.213.141]:43701 "EHLO mailuogwhop.emc.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753647AbbETV1c (ORCPT ); Wed, 20 May 2015 17:27:32 -0400 X-DKIM: OpenDKIM Filter v2.4.3 mailuogwprd02.lss.emc.com t4KLRGEL025244 X-DKIM: OpenDKIM Filter v2.4.3 mailuogwprd02.lss.emc.com t4KLRGEL025244 From: "Hubbe, Allen" To: "Jiang, Dave" , "bhelgaas@google.com" CC: "linux-kernel@vger.kernel.org" , "linux-pci@vger.kernel.org" , "jdmason@kudzu.us" , "linux-ntb@googlegroups.com" Subject: RE: [PATCH 04/16] Check the DID for certain workaround error flags to be set. Thread-Topic: [PATCH 04/16] Check the DID for certain workaround error flags to be set. Thread-Index: AQHQkz1tPutlzpIy2kK1PsC7sHiWX52Fn8QAgAABDYD//78UQA== Date: Wed, 20 May 2015 21:26:52 +0000 Message-ID: <40F65EF2B5E2254199711F58E3ACB84D7825D318@MX104CL02.corp.emc.com> References: <9c6ef6eec533bd94ddc6df96bb0b2d37baff75cf.1432135631.git.Allen.Hubbe@emc.com> <1432156539.19618.135.camel@intel.com> In-Reply-To: <1432156539.19618.135.camel@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.225.134] Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 X-Sentrion-Hostname: mailusrhubprd02.lss.emc.com X-RSA-Classifications: public Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by nfs id t4KLRgSJ014781 Content-Length: 4539 Lines: 108 From: linux-ntb@googlegroups.com [mailto:linux-ntb@googlegroups.com] On Behalf Of Jiang, Dave > On Wed, 2015-05-20 at 16:11 -0500, Bjorn Helgaas wrote: > > On Wed, May 20, 2015 at 10:41 AM, Allen Hubbe > wrote: > > > From: Dave Jiang > > > > > > Signed-off-by: Dave Jiang > > > > Needs a topic in the subject line and a changelog. > > > > It also seems to do a lot more than just checking device ID (I assume > > that's what "DID" means), so this should probably be split into > > several patches that each do one thing. I see at least: > > > > - cosmetic code restructuring > > - work_struct/tasklet_struct changes > > - new #defines and bar2_off() changes > > I think this patch got mangled with couple other patches. Allen? Yes, there will be a v2 to fix the mangling. The code restructuring is meant for a different patch. This is all that is meant to change in this patch: > > > @@ -1747,29 +1722,68 @@ static int snb_init_dev(struct intel_ntb_dev > *ndev) > > > u8 ppd; > > > int rc, mem; > > > > > > + pdev = ndev_pdev(ndev); > > > + > > > + switch (pdev->device) { > > > /* There is a Xeon hardware errata related to writes to > SDOORBELL or > > > * B2BDOORBELL in conjunction with inbound access to NTB > MMIO Space, > > > * which may hang the system. To workaround this use the > second memory > > > * window to access the interrupt and scratch pad registers > on the > > > * remote system. > > > */ > > > - ndev->hwerr_flags |= NTB_HWERR_SDOORBELL_LOCKUP; > > > + case PCI_DEVICE_ID_INTEL_NTB_SS_JSF: > > > + case PCI_DEVICE_ID_INTEL_NTB_PS_JSF: > > > + case PCI_DEVICE_ID_INTEL_NTB_B2B_JSF: > > > + case PCI_DEVICE_ID_INTEL_NTB_SS_SNB: > > > + case PCI_DEVICE_ID_INTEL_NTB_PS_SNB: > > > + case PCI_DEVICE_ID_INTEL_NTB_B2B_SNB: > > > + case PCI_DEVICE_ID_INTEL_NTB_SS_IVT: > > > + case PCI_DEVICE_ID_INTEL_NTB_PS_IVT: > > > + case PCI_DEVICE_ID_INTEL_NTB_B2B_IVT: > > > + case PCI_DEVICE_ID_INTEL_NTB_SS_HSX: > > > + case PCI_DEVICE_ID_INTEL_NTB_PS_HSX: > > > + case PCI_DEVICE_ID_INTEL_NTB_B2B_HSX: > > > + ndev->hwerr_flags |= NTB_HWERR_SDOORBELL_LOCKUP; > > > + break; > > > + } > > > > > > + switch (pdev->device) { > > > /* There is a hardware errata related to accessing any > register in > > > * SB01BASE in the presence of bidirectional traffic > crossing the NTB. > > > */ > > > - ndev->hwerr_flags |= NTB_HWERR_SB01BASE_LOCKUP; > > > + case PCI_DEVICE_ID_INTEL_NTB_SS_IVT: > > > + case PCI_DEVICE_ID_INTEL_NTB_PS_IVT: > > > + case PCI_DEVICE_ID_INTEL_NTB_B2B_IVT: > > > + case PCI_DEVICE_ID_INTEL_NTB_SS_HSX: > > > + case PCI_DEVICE_ID_INTEL_NTB_PS_HSX: > > > + case PCI_DEVICE_ID_INTEL_NTB_B2B_HSX: > > > + ndev->hwerr_flags |= NTB_HWERR_SB01BASE_LOCKUP; > > > + break; > > > + } > > > > > > + switch (pdev->device) { > > > /* HW Errata on bit 14 of b2bdoorbell register. Writes will > not be > > > * mirrored to the remote system. Shrink the number of bits > by one, > > > * since bit 14 is the last bit. > > > */ > > > - ndev->hwerr_flags |= NTB_HWERR_B2BDOORBELL_BIT14; > > > + case PCI_DEVICE_ID_INTEL_NTB_SS_JSF: > > > + case PCI_DEVICE_ID_INTEL_NTB_PS_JSF: > > > + case PCI_DEVICE_ID_INTEL_NTB_B2B_JSF: > > > + case PCI_DEVICE_ID_INTEL_NTB_SS_SNB: > > > + case PCI_DEVICE_ID_INTEL_NTB_PS_SNB: > > > + case PCI_DEVICE_ID_INTEL_NTB_B2B_SNB: > > > + case PCI_DEVICE_ID_INTEL_NTB_SS_IVT: > > > + case PCI_DEVICE_ID_INTEL_NTB_PS_IVT: > > > + case PCI_DEVICE_ID_INTEL_NTB_B2B_IVT: > > > + case PCI_DEVICE_ID_INTEL_NTB_SS_HSX: > > > + case PCI_DEVICE_ID_INTEL_NTB_PS_HSX: > > > + case PCI_DEVICE_ID_INTEL_NTB_B2B_HSX: > > > + ndev->hwerr_flags |= NTB_HWERR_B2BDOORBELL_BIT14; > > > + break; > > > + } > > > > > > ndev->reg = &snb_reg; > > > > > > - pdev = ndev_pdev(ndev); > > > - > > > rc = pci_read_config_byte(pdev, SNB_PPD_OFFSET, &ppd); > > > if (rc) > > > return -EIO; ????{.n?+???????+%?????ݶ??w??{.n?+????{??G?????{ay?ʇڙ?,j??f???h?????????z_??(?階?ݢj"???m??????G????????????&???~???iO???z??v?^?m???? ????????I?