Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932138AbbETXVt (ORCPT ); Wed, 20 May 2015 19:21:49 -0400 Received: from mail-wi0-f179.google.com ([209.85.212.179]:36563 "EHLO mail-wi0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753205AbbETXVr (ORCPT ); Wed, 20 May 2015 19:21:47 -0400 Message-ID: <555D1706.7040309@gmail.com> Date: Thu, 21 May 2015 01:21:42 +0200 From: Sebastian Hesselbarth User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 To: Antoine Tenart CC: zmxu@marvell.com, jszhang@marvell.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] ARM: berlin: add SPI nodes for BG2Q References: <1432126385-27402-1-git-send-email-antoine.tenart@free-electrons.com> In-Reply-To: <1432126385-27402-1-git-send-email-antoine.tenart@free-electrons.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2038 Lines: 77 On 20.05.2015 14:53, Antoine Tenart wrote: > The BG2Q SoC has two SPI controllers. Add the corresponding nodes. > > Signed-off-by: Antoine Tenart > --- [...] Some more I noticed while looking at BG2's spi controllers. > diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi > index 187d056f7ad2..c25ee86b2bfa 100644 > --- a/arch/arm/boot/dts/berlin2q.dtsi > +++ b/arch/arm/boot/dts/berlin2q.dtsi > @@ -286,6 +286,20 @@ > status = "disabled"; > }; > > + spi0: spi@1c00 { > + compatible = "snps,dw-apb-ssi"; > + reg = <0x1c00 0x100>; > + interrupt-parrent = <&aic>; > + interrupts = <7>; > + clocks = <&chip_clk CLKID_CFG>; > + pinctrl-0 = <&spi0_pmux>; > + pinctrl-names = "default"; > + #address-cells = <1>; > + #size-cells = <0>; > + num-cs = <4>; As you are adding this node to the SoC dtsi, I doubt that all boards will use the _up to_ 4 available CSn lines. Most likely only one (or even none) CSn will be used. Anyway, you can leave the num-cs at 4 but... > + status = "disabled"; > + }; > + > timer0: timer@2c00 { > compatible = "snps,dw-apb-timer"; > reg = <0x2c00 0x14>; > @@ -383,6 +397,11 @@ > groups = "G7"; > function = "twsi1"; > }; > + > + spi0_pmux: spi0-pmux { > + groups = "G8", "G9", "G10", "G11"; > + function = "spi1"; > + }; ... can you check which of G8-G11 are actually clock/data and which are CSn lines? CSn lines should all be optional and per-board pinmux - same for the other spi pinmux. > }; > > chip_rst: reset { > @@ -473,6 +492,20 @@ > }; > }; > > + spi1: spi@5000 { > + compatible = "snps,dw-apb-ssi"; > + reg = <0x6000 0x100>; s/spi@5000/spi@6000/ Sebastian -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/