From: Peter Chen <Peter.Chen@freescale.com>
To: Rob Herring <robh@kernel.org>
CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Kishon Vijay Abraham I <kishon@ti.com>,
        Linux USB List <linux-usb@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        Arnd Bergmann <arnd@arndb.de>, Alan Stern <stern@rowland.harvard.edu>
Subject: RE: [PATCH v2 6/6] usb: chipidea: add work-around for Marvell HSIC
 PHY startup
Thread-Topic: [PATCH v2 6/6] usb: chipidea: add work-around for Marvell HSIC
 PHY startup
Thread-Index: AQHQkqIjirPikk73K06USWoeb1nR752GSRYA//+DbQCAAGPLQA==
Date: Thu, 21 May 2015 09:54:20 +0000
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References: <1432087805-16671-1-git-send-email-robh@kernel.org>
 <1432087805-16671-7-git-send-email-robh@kernel.org>
 <20150521031334.GA2897@shlinux2>
 <CAL_Jsq+0zaKZJwgAPea25a=TrChOJs0LdCRV-R824=qij3pnTw@mail.gmail.com>
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> 
> On Wed, May 20, 2015 at 10:13 PM, Peter Chen <peter.chen@freescale.com>
> wrote:
> > On Tue, May 19, 2015 at 09:10:05PM -0500, Rob Herring wrote:
> >> The Marvell 28nm HSIC PHY requires the port to be forced to HS mode
> >> after the port power is applied. This is done using the test mode in
> >> the PORTSC register.
> >>
> >> As HSIC is always HS, this work-around should be safe to do with all
> >> HSIC PHYs. If not, a flag can also be added.
> >
> > I think a flag is needed, not sure all vendors can work well with that.
> 
> Only i.MX6Sx uses HSIC in mainline. Is that something you can test? It would be
> better to not add flags unless they are really needed.
> Otherwise you end up with dozens of flags like SDHCI drivers have.
> 

I will have a test for this, and show you the result later.

Peter
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