Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757385AbbEVRsd (ORCPT ); Fri, 22 May 2015 13:48:33 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:8592 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756771AbbEVRsb (ORCPT ); Fri, 22 May 2015 13:48:31 -0400 Message-ID: <555F6B29.8030208@imgtec.com> Date: Fri, 22 May 2015 14:45:13 -0300 From: Ezequiel Garcia User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.5.0 MIME-Version: 1.0 To: Andrew Bresticker CC: Linux-MIPS , "linux-kernel@vger.kernel.org" , Mike Turquette , Stephen Boyd , James Hartley , Govindraj Raja , Damien Horsley , Kevin Cernekee , James Hogan Subject: Re: [PATCH 7/9] clk: pistachio: Add a rate table for the MIPS PLL References: <1432252663-31318-1-git-send-email-ezequiel.garcia@imgtec.com> <1432252663-31318-8-git-send-email-ezequiel.garcia@imgtec.com> In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.100.200.196] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3285 Lines: 75 On 05/22/2015 02:45 PM, Andrew Bresticker wrote: > On Thu, May 21, 2015 at 4:57 PM, Ezequiel Garcia > wrote: >> This commit adds a rate parameter table, which makes it possible for >> the MIPS PLL to support rate change. >> >> Signed-off-by: Govindraj Raja >> Signed-off-by: Ezequiel Garcia >> --- >> drivers/clk/pistachio/clk-pistachio.c | 12 +++++++++++- >> drivers/clk/pistachio/clk.h | 12 ++++++++++++ >> 2 files changed, 23 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/clk/pistachio/clk-pistachio.c b/drivers/clk/pistachio/clk-pistachio.c >> index 22a7ebd..0ac7429 100644 >> --- a/drivers/clk/pistachio/clk-pistachio.c >> +++ b/drivers/clk/pistachio/clk-pistachio.c >> @@ -145,8 +145,18 @@ static struct pistachio_mux pistachio_muxes[] __initdata = { >> MUX(CLK_BT_PLL_MUX, "bt_pll_mux", mux_xtal_bt, 0x200, 17), >> }; >> >> +static struct pistachio_pll_rate_table mips_pll_rates[] = { >> + MIPS_PLL_RATES(52000000, 416000000, 1, 16, 2, 1), >> + MIPS_PLL_RATES(52000000, 442000000, 1, 17, 2, 1), >> + MIPS_PLL_RATES(52000000, 468000000, 1, 18, 2, 1), >> + MIPS_PLL_RATES(52000000, 494000000, 1, 19, 2, 1), >> + MIPS_PLL_RATES(52000000, 520000000, 1, 20, 2, 1), >> + MIPS_PLL_RATES(52000000, 546000000, 1, 21, 2, 1), >> +}; >> + >> static struct pistachio_pll pistachio_plls[] __initdata = { >> - PLL_FIXED(CLK_MIPS_PLL, "mips_pll", "xtal", PLL_GF40LP_LAINT, 0x0), >> + PLL(CLK_MIPS_PLL, "mips_pll", "xtal", PLL_GF40LP_LAINT, 0x0, >> + mips_pll_rates), >> PLL_FIXED(CLK_AUDIO_PLL, "audio_pll", "audio_refclk_mux", >> PLL_GF40LP_FRAC, 0xc), >> PLL_FIXED(CLK_RPU_V_PLL, "rpu_v_pll", "xtal", PLL_GF40LP_LAINT, 0x20), >> diff --git a/drivers/clk/pistachio/clk.h b/drivers/clk/pistachio/clk.h >> index 3bb6bbe..b5d22d6 100644 >> --- a/drivers/clk/pistachio/clk.h >> +++ b/drivers/clk/pistachio/clk.h >> @@ -121,6 +121,18 @@ struct pistachio_pll_rate_table { >> unsigned int frac; >> }; >> >> +#define MIPS_PLL_RATES(_fref, _fout, _refdiv, _fbdiv, \ >> + _postdiv1, _postdiv2) \ >> +{ \ >> + .fref = _fref, \ >> + .fout = _fout, \ >> + .refdiv = _refdiv, \ >> + .fbdiv = _fbdiv, \ >> + .postdiv1 = _postdiv1, \ >> + .postdiv2 = _postdiv2, \ >> + .frac = 0, \ >> +} > > Wouldn't this be applicable to any integer PLL, not just MIPS_PLL? > Also, maybe we should just populate fout_{min,max} here, setting them > to _fout? See my comment in patch 3/9. > Yes, you are right. An INT_PLL_RATE would be OK, setting frac to 0 and fout_{min,max} to fout. I'll respin. -- Ezequiel -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/