Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932360AbbEVSlh (ORCPT ); Fri, 22 May 2015 14:41:37 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:59808 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932231AbbEVSld (ORCPT ); Fri, 22 May 2015 14:41:33 -0400 Date: Fri, 22 May 2015 11:41:31 -0700 From: Stephen Boyd To: Brent Wang Cc: Bintian , Mike Turquette , Zhangfei Gao , Xu Wei , "xuejiancheng@huawei.com" , Tomeu Vizoso , "sledge.yanwei@huawei.com" , linux-clk@vger.kernel.org, "linux-kernel@vger.kernel.org" , Arnd Bergmann , Will Deacon , Rob Herring , Kevin Hilman , Mark Rutland , Catalin Marinas , Haojian Zhuang , linux-arm-kernel , Olof Johansson , Haifeng Yan , Russell King - ARM Linux , Guodong Xu , Jorge Ramirez-Ortiz , Tyler Baker , Kevin Hilman , "xuyiping@hisilicon.com" , "wangbinghui@hisilicon.com" , "zhenwei.wang@hisilicon.com" , "victor.lixin@hisilicon.com" , "puck.chen@hisilicon.com" , "dan.zhao@hisilicon.com" , "huxinwei@huawei.com" , "z.liuxinliang@huawei.com" , "heyunlei@huawei.com" , XinWei Kong , "w.f@huawei.com" , "Liguozhu (Kenneth)" Subject: Re: [PATCH v7 6/7] clk: hi6220: Clock driver support for Hisilicon hi6220 SoC Message-ID: <20150522184131.GD1885@codeaurora.org> References: <1432117752-7074-1-git-send-email-bintian.wang@huawei.com> <1432117752-7074-2-git-send-email-bintian.wang@huawei.com> <555D09F3.7020506@codeaurora.org> <555D57BB.8080702@huawei.com> <555E1D55.1050907@codeaurora.org> <555EBCA4.9030303@huawei.com> <555F76D9.10308@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <555F76D9.10308@codeaurora.org> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1678 Lines: 56 On 05/22, Stephen Boyd wrote: > On 05/22/15 11:30, Brent Wang wrote: > > Hello Stephen, > > > > 2015-05-22 13:20 GMT+08:00 Bintian : > >> > >>> > >>> Is pl011 the uart device? Does it have a node in DT somewhere? If it > >>> does, then we could put the assigned-parents properties in that node so > >>> that when the pl011 probes the uart1 clock has its parent set to > >>> clk_150m. See the "Assigned clock parents and rates" section of > >>> Documentation/devicetree/bindings/clock/clock-bindings.txt. > >>> > >> I will verify this. > > Currently the "assigned-clock*" doesn't work for pl011 UART device > > node, maybe we will > > do some fix for its driver later or other modules. > > Why doesn't it work? > Does this patch help? ---8<---- diff --git a/drivers/amba/bus.c b/drivers/amba/bus.c index f0099360039e..350ed93d4281 100644 --- a/drivers/amba/bus.c +++ b/drivers/amba/bus.c @@ -19,6 +19,7 @@ #include #include #include +#include #include @@ -237,6 +238,10 @@ static int amba_probe(struct device *dev) int ret; do { + ret = of_clk_set_defaults(dev->of_node, false); + if (ret < 0) + break; + ret = dev_pm_domain_attach(dev, true); if (ret == -EPROBE_DEFER) break; -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/