Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753197AbbEZMxQ (ORCPT ); Tue, 26 May 2015 08:53:16 -0400 Received: from [209.85.220.42] ([209.85.220.42]:36648 "EHLO mail-pa0-f42.google.com" rhost-flags-FAIL-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1753139AbbEZMxM (ORCPT ); Tue, 26 May 2015 08:53:12 -0400 From: Hanjun Guo To: Bjorn Helgaas , Arnd Bergmann , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" Cc: Jiang Liu , Liviu Dudau , Thomas Gleixner , Yijing Wang , Lorenzo Pieralisi , Tomasz Nowicki , Suravee Suthikulpanit , Mark Salter , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linaro-acpi@lists.linaro.org, Hanjun Guo Subject: [PATCH 02/11] x86, pci: Clean up comment about buggy MMIO config space access for AMD Fam10h CPUs. Date: Tue, 26 May 2015 20:49:15 +0800 Message-Id: <1432644564-24746-3-git-send-email-hanjun.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1432644564-24746-1-git-send-email-hanjun.guo@linaro.org> References: <1432644564-24746-1-git-send-email-hanjun.guo@linaro.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1628 Lines: 42 From: Tomasz Nowicki - fix typo - improve explanation - add reference to the related document Signed-off-by: Tomasz Nowicki Signed-off-by: Hanjun Guo Tested-by: Suravee Suthikulpanit --- arch/x86/include/asm/pci_x86.h | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h index 164e3f8..eddf8f0 100644 --- a/arch/x86/include/asm/pci_x86.h +++ b/arch/x86/include/asm/pci_x86.h @@ -154,10 +154,13 @@ extern struct list_head pci_mmcfg_list; /* * AMD Fam10h CPUs are buggy, and cannot access MMIO config space - * on their northbrige except through the * %eax register. As such, you MUST - * NOT use normal IOMEM accesses, you need to only use the magic mmio-config + * on their northbridge except through the * %eax register. As such, you MUST + * NOT use normal IOMEM accesses, you need to only use the magic mmio_config_* * accessor functions. - * In fact just use pci_config_*, nothing else please. + * + * Please refer to the following doc: + * "BIOS and Kernel Developer's Guide (BKDG) For AMD Family 10h Processors", + * rev. 3.48, sec 2.11.1, "MMIO Configuration Coding Requirements". */ static inline unsigned char mmio_config_readb(void __iomem *pos) { -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/