Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754897AbbFBIVi (ORCPT ); Tue, 2 Jun 2015 04:21:38 -0400 Received: from mout.kundenserver.de ([212.227.17.10]:52855 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751591AbbFBIV2 (ORCPT ); Tue, 2 Jun 2015 04:21:28 -0400 From: Arnd Bergmann To: Toshi Kani Cc: Dan Williams , mingo@redhat.com, bp@alien8.de, hpa@zytor.com, tglx@linutronix.de, ross.zwisler@linux.intel.com, akpm@linux-foundation.org, jgross@suse.com, x86@kernel.org, linux-nvdimm@ml01.01.org, mcgrof@suse.com, konrad.wilk@oracle.com, linux-kernel@vger.kernel.org, stefan.bader@canonical.com, luto@amacapital.net, linux-mm@kvack.org, geert@linux-m68k.org, hmh@hmh.eng.br, tj@kernel.org, hch@lst.de, dhowells@redhat.com Subject: Re: [PATCH v2 1/4] arch/*/asm/io.h: add ioremap_cache() to all architectures Date: Tue, 02 Jun 2015 10:20:48 +0200 Message-ID: <1825055.kiMypDskUT@wuerfel> User-Agent: KMail/4.11.5 (Linux/3.16.0-10-generic; KDE/4.11.5; x86_64; ; ) In-Reply-To: <1433198166.23540.128.camel@misato.fc.hp.com> References: <20150530185425.32590.3190.stgit@dwillia2-desk3.amr.corp.intel.com> <20150530185923.32590.98598.stgit@dwillia2-desk3.amr.corp.intel.com> <1433198166.23540.128.camel@misato.fc.hp.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:3iPSrUTp1qNL0l30zl1GGYnrEDRtFRUI7VeaswUcJLbhf8Yxzrm AyoPLF+bXSNf7vm9aKfy7KLIEds7ZPMQ5rbhMs4R8/q+WaHs9G005WCxwVQ/cXci4NrfmES SYMqt5InXHS7PtkrNqssGx0O58tNDjm8CpUACCz09jDrkWKBZ0QqEkMqqkyY/E03wC9+yS9 +133F3zBnolKK3+ZauhOw== X-UI-Out-Filterresults: notjunk:1;V01:K0:JkrtH11ouPo=:WbROHeMwblQySTZJHaYGEv cNQSK0sJ5v2oRgl8LtymM2J71VeTH/GQ04/6e/gf8ykiZt1VH/hwCm7tqqjaP1eH0xP1PEvpc FhNGEHIMfWZAjueXxVJLiH5e2w1f/AkxpoI459uNsqnwvNsHOzo/6kYH4Ot2YtpXtAcpA1Sqr UAdv31jQU8P1UbXphulUdBeWpy3YC1X0xLYurELRhcpzDPOuWTpWLVTphJNodUbq9GhWvVtKF 1N+7XkMAZSP+EFcgdj71jc+47QP0asqGMaLjVktHFGPoC38sWLHiBFUjtPikqHz4pFpIM9Qnr JYzZ1Ah0S7Gfq/XRRMDXQt0cHVKDuBEyN/ldTA1zV8b8oVG1bj48gsBX/BxSHVmCZovzhvihf oYT/gEqlkjLxR1u4JMHqMi6SVGykTEpH2UrrXNPNeSgnqWfbbsZ3CPM8kn4yca1bGE7yT8N0S POMnN+VMb/yOri+VTvxszQkyvhpZMDa4nGebewvo7SYnHjqSdIPh97+pkwQCNCFfXPuPg+Sr9 o9GBN4iwbKs0wrPNaltM0lohuTKnGbGpL/BEageQ24xVnqLXMgMyJXMJgHnBMaMU2/VTg8uU3 QrYNFLjj9h69hvPRiejcHyVGz8GXTlHynJOfp01sz2LuqNpy0yZU6jMrfH5rzccFMVdbtwCcc CLqbiefIHD0eLwKjjOA7Tib173D5RtRzf3o/CuEFIB8hwgg== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2982 Lines: 77 On Monday 01 June 2015 16:36:06 Toshi Kani wrote: > On Sat, 2015-05-30 at 14:59 -0400, Dan Williams wrote: > > Similar to ioremap_wc() let architecture implementations optionally > > provide ioremap_cache(). As is, current ioremap_cache() users have > > architecture dependencies that prevent them from compiling on archs > > without ioremap_cache(). In some cases the architectures that have a > > cached ioremap() capability have an identifier other than > > "ioremap_cache". > > > > Allow drivers to compile with ioremap_cache() support and fallback to a > > safe / uncached ioremap otherwise. > : > > diff --git a/arch/mn10300/include/asm/io.h b/arch/mn10300/include/asm/io.h > > index 07c5b4a3903b..dcab414f40df 100644 > > --- a/arch/mn10300/include/asm/io.h > > +++ b/arch/mn10300/include/asm/io.h > > @@ -283,6 +283,7 @@ static inline void __iomem *ioremap_nocache(unsigned long offset, unsigned long > > > > #define ioremap_wc ioremap_nocache > > #define ioremap_wt ioremap_nocache > > +#define ioremap_cache ioremap_nocache > > From the comment in ioremap_nocache(), ioremap() may be cacheable in > this arch. Right, and I guess that would be a bug. ;-) mn10300 decides caching on the address, so presumably all arguments passed into ioremap here already have that bit set. I've checked all the resource definitions for mn10300, and they are all between 0xA0000000 and 0xBFFFFFFF, which is non-cacheable. > > diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h > > index f56094cfdeff..a0665dfcab47 100644 > > --- a/include/asm-generic/io.h > > +++ b/include/asm-generic/io.h > > @@ -793,6 +793,14 @@ static inline void __iomem *ioremap_wt(phys_addr_t offset, size_t size) > > } > > #endif > > > > +#ifndef ioremap_cache > > +#define ioremap_cache ioremap_cache > > +static inline void __iomem *ioremap_cache(phys_addr_t offset, size_t size) > > +{ > > + return ioremap_nocache(offset, size); > > Should this be defined as ioremap()? I would leave it like this, for clarity. All architectures at the moment need to define ioremap_nocache and ioremap to be the same thing anyway, but this definition makes it clearer that it's not actually cached. > > diff --git a/include/asm-generic/iomap.h b/include/asm-generic/iomap.h > > index d8f8622fa044..f0f30464cecd 100644 > > --- a/include/asm-generic/iomap.h > > +++ b/include/asm-generic/iomap.h > > @@ -70,6 +70,10 @@ extern void ioport_unmap(void __iomem *); > > #define ioremap_wt ioremap_nocache > > #endif > > > > +#ifndef ARCH_HAS_IOREMAP_CACHE > > +#define ioremap_cache ioremap_nocache > > Ditto. > > > Also, it'd be nice to remove ioremap_cached() and ioremap_fullcache() > with a separate patch in this opportunity. Agreed. Arnd -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/