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Date: Tue, 2 Jun 2015 13:28:35 +0200
Message-ID: <CACRpkdbtCDQLaPhWFT0a7NdJmxYzRvhU_efgUh2ZXhbc+FHg3g@mail.gmail.com>
Subject: Re: [PATCH 02/21] ARM: tegra: Add gpio-ranges property
From: Linus Walleij <linus.walleij@linaro.org>
To: Stephen Warren <swarren@wwwdotorg.org>
Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>,
        "linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
        =?UTF-8?Q?St=C3=A9phane_Marchesin?= <stephane.marchesin@gmail.com>,
        Thierry Reding <thierry.reding@gmail.com>,
        Dmitry Torokhov <dmitry.torokhov@gmail.com>,
        Alexander Holler <holler@ahsoftware.de>,
        Grant Likely <grant.likely@linaro.org>,
        Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>,
        Pawel Moll <pawel.moll@arm.com>,
        Ian Campbell <ijc+devicetree@hellion.org.uk>,
        Kumar Gala <galak@codeaurora.org>,
        Russell King <linux@arm.linux.org.uk>,
        Alexandre Courbot <gnurou@gmail.com>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
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On Tue, May 26, 2015 at 9:41 PM, Stephen Warren <swarren@wwwdotorg.org> wrote:
> On 05/25/2015 08:53 AM, Tomeu Vizoso wrote:
>>
>> Specify how the GPIOs map to the pins in T124, so the dependency is
>> explicit.
>>
>> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
>> ---
>>   arch/arm/boot/dts/tegra124.dtsi | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/arm/boot/dts/tegra124.dtsi
>> b/arch/arm/boot/dts/tegra124.dtsi
>> index 13cc7ca..5d1d35f 100644
>> --- a/arch/arm/boot/dts/tegra124.dtsi
>> +++ b/arch/arm/boot/dts/tegra124.dtsi
>> @@ -254,6 +254,7 @@
>>                 gpio-controller;
>>                 #interrupt-cells = <2>;
>>                 interrupt-controller;
>> +               gpio-ranges = <&pinmux 0 0 250>;
>
>
> We should be consistent between SoCs. Why not make the same change for all
> Tegra SoCs?

Agreed.

> I think this change will cause the GPIO subsystem to call into the pinctrl
> subsystem and create/add/register a new GPIO<->pinctrl range structure. The
> pinctrl driver already does this, so I think we'll end up with two duplicate
> entries in the pinctrl device's gpio_ranges list. This probably won't cause
> a problem, but I wanted to make sure you'd thought about it to make sure.

That sounds like duplication indeed, I would expect that first a patch
adds the ranges to the dts[i] files and then a second patch delete the
same ranges from the pinctrl driver then, if these shall come in from
the device tree.

With GPIO ranges being possible to register from the pin controller,
gpio chip and also the device tree, things get a bit complex
admittedly :/ sorry for this, just choose one.

Yours,
Linus Walleij
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