Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932354AbbFHNvh (ORCPT ); Mon, 8 Jun 2015 09:51:37 -0400 Received: from smarthost01a.mail.zen.net.uk ([212.23.1.1]:49107 "EHLO smarthost01a.mail.zen.net.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753740AbbFHNvX (ORCPT ); Mon, 8 Jun 2015 09:51:23 -0400 Message-ID: <1433771479.2882.44.camel@linaro.org> Subject: Re: [PATCH v4 6/8] arm64: dts: add SRAM, MHU mailbox and SCPI support on Juno From: "Jon Medhurst (Tixy)" To: Sudeep Holla Cc: linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Liviu Dudau , Lorenzo Pieralisi , Arnd Bergmann , Kevin Hilman , Olof Johansson Date: Mon, 08 Jun 2015 14:51:19 +0100 In-Reply-To: <1433760002-24120-7-git-send-email-sudeep.holla@arm.com> References: <1433760002-24120-1-git-send-email-sudeep.holla@arm.com> <1433760002-24120-7-git-send-email-sudeep.holla@arm.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.12.9-1+b1 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-Originating-smarthost01a-IP: [82.69.122.217] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1535 Lines: 46 On Mon, 2015-06-08 at 11:40 +0100, Sudeep Holla wrote: [...] > + > + scpi { > + compatible = "arm,scpi"; > + mboxes = <&mailbox 1>; > + shmem = <&cpu_scp_hpri>; > + > + clocks { > + compatible = "arm,scpi-clocks"; > + > + scpi_dvfs: scpi_clocks@0 { > + compatible = "arm,scpi-dvfs-clocks"; > + #clock-cells = <1>; > + clock-indices = <0>, <1>, <2>; > + clock-output-names = "vbig", "vlittle", "vgpu"; >From where do the clock names derive? They look more like names for voltage domains rather than clocks. My (admittedly very old) Juno docs, have the clocks as ATLCLK, APLCLK and GPUCLK. > + }; > + scpi_clk: scpi_clocks@3 { > + compatible = "arm,scpi-variable-clocks"; > + #clock-cells = <1>; > + clock-indices = <3>, <4>; > + clock-output-names = "pxlclk0", "pxlclk1"; Can we also have clock index 5, name 'i2s_clk', for used by audio? (I don't know what other clocks the SCP currently supports, but audio is one being currently used by the out-of-tree code). Also, I believe that both display outputs share the same clock, and so pxlclk0 and pxlclk1 can't be controlled independently. But I guess these device-tree entries are for the interface to the SCP firmware, not the hardware, and if that pretends the clocks are independent... -- Tixy -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/