Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753940AbbFIPi3 (ORCPT ); Tue, 9 Jun 2015 11:38:29 -0400 Received: from mail-wi0-f182.google.com ([209.85.212.182]:34116 "EHLO mail-wi0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753533AbbFIPiS (ORCPT ); Tue, 9 Jun 2015 11:38:18 -0400 From: Matthias Brugger To: mturquette@linaro.org, sboyd@codeaurora.org, matthias.bgg@gmail.com Cc: s.hauer@pengutronix.de, jamesjj.liao@mediatek.com, henryc.chen@mediatek.com, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, manabian@gmail.com Subject: [PATCH v3 3/3] clk: mediatek: Use regmap clk-mux for mt8135 Date: Tue, 9 Jun 2015 17:38:03 +0200 Message-Id: <1433864283-25490-4-git-send-email-matthias.bgg@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1433864283-25490-1-git-send-email-matthias.bgg@gmail.com> References: <1433864283-25490-1-git-send-email-matthias.bgg@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2526 Lines: 63 The pericfg controller is used by various device drivers, so that it is implemented via a regmap. In the actual clk implementation for mt8135, some clk-mux use the traditional register approach which acceses the register via iomem. This patch changes the use from iomem to the needed regmap. Signed-off-by: Matthias Brugger --- drivers/clk/mediatek/clk-mt8135.c | 21 +++++++-------------- 1 file changed, 7 insertions(+), 14 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8135.c b/drivers/clk/mediatek/clk-mt8135.c index 08b4b84..c28a9d4 100644 --- a/drivers/clk/mediatek/clk-mt8135.c +++ b/drivers/clk/mediatek/clk-mt8135.c @@ -513,11 +513,11 @@ static const char * const uart_ck_sel_parents[] __initconst = { "uart_sel", }; -static const struct mtk_composite peri_clks[] __initconst = { - MUX(CLK_PERI_UART0_SEL, "uart0_ck_sel", uart_ck_sel_parents, 0x40c, 0, 1), - MUX(CLK_PERI_UART1_SEL, "uart1_ck_sel", uart_ck_sel_parents, 0x40c, 1, 1), - MUX(CLK_PERI_UART2_SEL, "uart2_ck_sel", uart_ck_sel_parents, 0x40c, 2, 1), - MUX(CLK_PERI_UART3_SEL, "uart3_ck_sel", uart_ck_sel_parents, 0x40c, 3, 1), +static const struct mtk_regm_mux peri_clks[] __initconst = { + MUX_REGMAP(CLK_PERI_UART0_SEL, "uart0_ck_sel", uart_ck_sel_parents, 0x40c, 0, 1), + MUX_REGMAP(CLK_PERI_UART1_SEL, "uart1_ck_sel", uart_ck_sel_parents, 0x40c, 1, 1), + MUX_REGMAP(CLK_PERI_UART2_SEL, "uart2_ck_sel", uart_ck_sel_parents, 0x40c, 2, 1), + MUX_REGMAP(CLK_PERI_UART3_SEL, "uart3_ck_sel", uart_ck_sel_parents, 0x40c, 3, 1), }; static void __init mtk_topckgen_init(struct device_node *node) @@ -573,20 +573,13 @@ static void __init mtk_pericfg_init(struct device_node *node) { struct clk_onecell_data *clk_data; int r; - void __iomem *base; - - base = of_iomap(node, 0); - if (!base) { - pr_err("%s(): ioremap failed\n", __func__); - return; - } clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK); mtk_clk_register_gates(node, peri_gates, ARRAY_SIZE(peri_gates), clk_data); - mtk_clk_register_composites(peri_clks, ARRAY_SIZE(peri_clks), base, - &mt8135_clk_lock, clk_data); + mtk_clk_regm_register_mux(node, peri_clks, ARRAY_SIZE(peri_clks), + clk_data); r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); if (r) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/