Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965453AbbFJP7r (ORCPT ); Wed, 10 Jun 2015 11:59:47 -0400 Received: from ip4-83-240-67-251.cust.nbox.cz ([83.240.67.251]:36475 "EHLO ip4-83-240-18-248.cust.nbox.cz" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S966345AbbFJP6M (ORCPT ); Wed, 10 Jun 2015 11:58:12 -0400 From: Jiri Slaby To: stable@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Aravind Gopalakrishnan , Paolo Bonzini , Jan Kiszka , Len Brown , Fenghua Yu , Peter Zijlstra , , , Ingo Molnar , Jiri Slaby Subject: [PATCH 3.12 031/111] perf/x86/amd/ibs: Update IBS MSRs and feature definitions Date: Wed, 10 Jun 2015 17:26:20 +0200 Message-Id: X-Mailer: git-send-email 2.4.2 In-Reply-To: <93091169a673f49c2574cddf1ef858cf0704f646.1433943052.git.jslaby@suse.cz> References: <93091169a673f49c2574cddf1ef858cf0704f646.1433943052.git.jslaby@suse.cz> In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3419 Lines: 93 From: Aravind Gopalakrishnan 3.12-stable review patch. If anyone has any objections, please let me know. =============== commit 904cb3677f3adcd3d837be0a0d0b14251ba8d6f7 upstream. New Fam15h models carry extra feature bits and extend the MSR register space for IBS ops. Adding them here. While at it, add functionality to read IbsBrTarget and OpData4 depending on their availability if user wants a PERF_SAMPLE_RAW. Signed-off-by: Aravind Gopalakrishnan Acked-by: Borislav Petkov Cc: Paolo Bonzini Cc: Jan Kiszka Cc: Len Brown Cc: Fenghua Yu Cc: Peter Zijlstra Cc: Cc: Link: http://lkml.kernel.org/r/1415651066-13523-1-git-send-email-Aravind.Gopalakrishnan@amd.com Signed-off-by: Ingo Molnar Signed-off-by: Jiri Slaby --- arch/x86/include/asm/perf_event.h | 3 +++ arch/x86/include/uapi/asm/msr-index.h | 1 + arch/x86/kernel/cpu/perf_event_amd_ibs.c | 15 +++++++++++++++ 3 files changed, 19 insertions(+) diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h index 8249df45d2f2..348d9ac94d4e 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h @@ -169,6 +169,9 @@ struct x86_pmu_capability { #define IBS_CAPS_BRNTRGT (1U<<5) #define IBS_CAPS_OPCNTEXT (1U<<6) #define IBS_CAPS_RIPINVALIDCHK (1U<<7) +#define IBS_CAPS_OPBRNFUSE (1U<<8) +#define IBS_CAPS_FETCHCTLEXTD (1U<<9) +#define IBS_CAPS_OPDATA4 (1U<<10) #define IBS_CAPS_DEFAULT (IBS_CAPS_AVAIL \ | IBS_CAPS_FETCHSAM \ diff --git a/arch/x86/include/uapi/asm/msr-index.h b/arch/x86/include/uapi/asm/msr-index.h index 228d95f6592a..dbb591390b9e 100644 --- a/arch/x86/include/uapi/asm/msr-index.h +++ b/arch/x86/include/uapi/asm/msr-index.h @@ -201,6 +201,7 @@ #define MSR_AMD64_IBSOP_REG_MASK ((1UL<offset_max, offset + 1); } while (offset < offset_max); + if (event->attr.sample_type & PERF_SAMPLE_RAW) { + /* + * Read IbsBrTarget and IbsOpData4 separately + * depending on their availability. + * Can't add to offset_max as they are staggered + */ + if (ibs_caps & IBS_CAPS_BRNTRGT) { + rdmsrl(MSR_AMD64_IBSBRTARGET, *buf++); + size++; + } + if (ibs_caps & IBS_CAPS_OPDATA4) { + rdmsrl(MSR_AMD64_IBSOPDATA4, *buf++); + size++; + } + } ibs_data.size = sizeof(u64) * size; regs = *iregs; -- 2.4.2 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/