Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756621AbbFQMNI (ORCPT ); Wed, 17 Jun 2015 08:13:08 -0400 Received: from arrakis.dune.hu ([78.24.191.176]:35018 "EHLO arrakis.dune.hu" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754762AbbFQMMm (ORCPT ); Wed, 17 Jun 2015 08:12:42 -0400 MIME-Version: 1.0 In-Reply-To: <1434535262-7393-1-git-send-email-sifan.naeem@imgtec.com> References: <1434535262-7393-1-git-send-email-sifan.naeem@imgtec.com> From: Jonas Gorski Date: Wed, 17 Jun 2015 14:12:15 +0200 Message-ID: Subject: Re: [PATCH v2] spi: img-spfi: Same Edge bit set to double supported transfer speed To: Sifan Naeem Cc: Mark Brown , linux-spi@vger.kernel.org, "linux-kernel@vger.kernel.org" , Andrew Bresticker Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2065 Lines: 50 Hi, On Wed, Jun 17, 2015 at 12:01 PM, Sifan Naeem wrote: > Same edge bit set in SPFI Control register to double the supported > spfi clock speed. Setting this bit increases the supported spfi > frequency from 1/8 to 1/4 of the core clock frequency. > > Without this bit set the maximum speed supported was 25MHz on > Pistachio. > > Change-Id: I26782ea88ac3567e72dac11e46c5b5f5f52c5e3d > Signed-off-by: Sifan Naeem > --- > drivers/spi/spi-img-spfi.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/spi/spi-img-spfi.c b/drivers/spi/spi-img-spfi.c > index 788e2b1..acce90a 100644 > --- a/drivers/spi/spi-img-spfi.c > +++ b/drivers/spi/spi-img-spfi.c > @@ -40,6 +40,7 @@ > #define SPFI_CONTROL_SOFT_RESET BIT(11) > #define SPFI_CONTROL_SEND_DMA BIT(10) > #define SPFI_CONTROL_GET_DMA BIT(9) > +#define SPFI_CONTROL_SE BIT(8) > #define SPFI_CONTROL_TMODE_SHIFT 5 > #define SPFI_CONTROL_TMODE_MASK 0x7 > #define SPFI_CONTROL_TMODE_SINGLE 0 > @@ -491,6 +492,7 @@ static void img_spfi_config(struct spi_master *master, struct spi_device *spi, > else if (xfer->tx_nbits == SPI_NBITS_QUAD && > xfer->rx_nbits == SPI_NBITS_QUAD) > val |= SPFI_CONTROL_TMODE_QUAD << SPFI_CONTROL_TMODE_SHIFT; > + val |= SPFI_CONTROL_SE; > spfi_writel(spfi, val, SPFI_CONTROL); > } Don't you also need to update master->max_speed_hz? And if it doubles the clock speed, don't you need to reflect that in the calculation for the devider? Currently it looks like it would just cause all transfers to go with the doubled requested rate. But maybe I'm missing something. Regards Jonas -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/