Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756302AbbFRQjm (ORCPT ); Thu, 18 Jun 2015 12:39:42 -0400 Received: from down.free-electrons.com ([37.187.137.238]:44798 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1756137AbbFRQj1 (ORCPT ); Thu, 18 Jun 2015 12:39:27 -0400 Date: Thu, 18 Jun 2015 18:39:24 +0200 From: Alexandre Belloni To: Cyrille Pitchen Cc: nicolas.ferre@atmel.com, gregkh@linuxfoundation.org, wenyou.yang@atmel.com, ludovic.desroches@atmel.com, leilei.zhao@atmel.com, josh.wu@atmel.com, linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, galak@codeaurora.org, ijc+devicetree@hellion.org.uk, mark.rutland@arm.com, pawel.moll@arm.com, robh+dt@kernel.org Subject: Re: [PATCH linux-next v2 1/4] ARM: at91/dt: add a new DT property to support FIFOs on Atmel USARTs Message-ID: <20150618163924.GQ27492@piout.net> References: <16bdcf0c3f710ca46df86eeea82c9840454cb7aa.1434038494.git.cyrille.pitchen@atmel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <16bdcf0c3f710ca46df86eeea82c9840454cb7aa.1434038494.git.cyrille.pitchen@atmel.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1542 Lines: 34 On 11/06/2015 at 18:20:14 +0200, Cyrille Pitchen wrote : > This patch adds a new DT property, "atmel,fifo-size", to enable and set > the maximum number of data the RX and TX FIFOs can store on FIFO capable > USARTs. > > Please be aware that the VERSION register can not be used to guess the > size of FIFOs. Indeed, for a given hardware version, the USARTs can be > integrated on Atmel SoCs with different FIFO sizes. Also the > "atmel,fifo-size" property is optional as older USARTs don't embed FIFO at > all. > > Besides, the FIFO size can not be read or guessed from other registers: > When designing the FIFO feature, no dedicated registers were added to > store this size. Unsed spaces in the I/O register range are limited and > better reserved for future usages. Instead, the FIFO size of each > peripheral is documented in the programmer datasheet. > > Finally, on a given SoC, there can be several instances of USART with > different FIFO sizes. This explain why we'd rather use a dedicated DT > property than use the "compatible" property. > > Signed-off-by: Cyrille Pitchen Acked-by: Alexandre Belloni -- Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/