Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752414AbbFRVca (ORCPT ); Thu, 18 Jun 2015 17:32:30 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:13384 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753199AbbFRVaU (ORCPT ); Thu, 18 Jun 2015 17:30:20 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Thu, 18 Jun 2015 14:25:29 -0700 From: Rhyland Klein To: Peter De Schrijver , Thierry Reding CC: Mike Turquette , Stephen Warren , Stephen Boyd , Alexandre Courbot , Bill Huang , Jim Lin , Benson Leung , linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, Rhyland Klein Subject: [PATCH v6 17/25] clk: tegra: pll: Add dyn_ramp callback Date: Thu, 18 Jun 2015 17:28:32 -0400 Message-ID: <1434662920-21469-18-git-send-email-rklein@nvidia.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1434662920-21469-1-git-send-email-rklein@nvidia.com> References: <1434662920-21469-1-git-send-email-rklein@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2151 Lines: 64 Add a callback to the pll_params for custom dynamic ramping functions which can be specified per PLL. Reviewed-by: Benson Leung Signed-off-by: Bill Huang Signed-off-by: Rhyland Klein --- v6: - Added kerneldoc - Moved adding dyn_ramp callback from set_defaults patch to this patch - Reordered patch drivers/clk/tegra/clk-pll.c | 7 +++++++ drivers/clk/tegra/clk.h | 4 ++++ 2 files changed, 11 insertions(+) diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c index f878bc879df2..c6cb22cebac1 100644 --- a/drivers/clk/tegra/clk-pll.c +++ b/drivers/clk/tegra/clk-pll.c @@ -660,6 +660,13 @@ static int _program_pll(struct clk_hw *hw, struct tegra_clk_pll_freq_table *cfg, _get_pll_mnp(pll, &old_cfg); + if (state && pll->params->defaults_set && pll->params->dyn_ramp && + (cfg->m == old_cfg.m) && (cfg->p == old_cfg.p)) { + ret = pll->params->dyn_ramp(pll, cfg); + if (!ret) + return 0; + } + if (state) _clk_pll_disable(hw); diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h index ae42e3e6a116..d29d095659a2 100644 --- a/drivers/clk/tegra/clk.h +++ b/drivers/clk/tegra/clk.h @@ -213,6 +213,8 @@ struct tegra_clk_pll; * is already enabled, it will be done the first * time the rate is changed while the PLL is * disabled. + * @dyn_ramp: Callback which can be used to define a custom + * dynamic ramp function for a given PLL. * * Flags: * TEGRA_PLL_USE_LOCK - This flag indicated to use lock bits for @@ -284,6 +286,8 @@ struct tegra_clk_pll_params { unsigned long (*adjust_vco)(struct tegra_clk_pll_params *pll_params, unsigned long parent_rate); void (*set_defaults)(struct tegra_clk_pll *pll); + int (*dyn_ramp)(struct tegra_clk_pll *pll, + struct tegra_clk_pll_freq_table *cfg); }; #define TEGRA_PLL_USE_LOCK BIT(0) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/