Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932321AbbFWIZc (ORCPT ); Tue, 23 Jun 2015 04:25:32 -0400 Received: from mail-wg0-f44.google.com ([74.125.82.44]:33518 "EHLO mail-wg0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754404AbbFWIZU (ORCPT ); Tue, 23 Jun 2015 04:25:20 -0400 Message-ID: <558917ED.8080404@linaro.org> Date: Tue, 23 Jun 2015 09:25:17 +0100 From: Daniel Thompson User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 MIME-Version: 1.0 To: Stephen Boyd CC: Mike Turquette , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Maxime Coquelin , Kamil Lulko , Andreas Farber , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, patches@linaro.org, linaro-kernel@lists.linaro.org Subject: Re: [PATCH v3 2/3] clk: stm32: Add clock driver for STM32F4[23]xxx devices References: <1432327273-6810-1-git-send-email-daniel.thompson@linaro.org> <1433966978-24422-1-git-send-email-daniel.thompson@linaro.org> <1433966978-24422-3-git-send-email-daniel.thompson@linaro.org> <20150622232114.GK22132@codeaurora.org> In-Reply-To: <20150622232114.GK22132@codeaurora.org> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1349 Lines: 32 On 23/06/15 00:21, Stephen Boyd wrote: > On 06/10, Daniel Thompson wrote: >> The driver supports decoding and statically modelling PLL state (i.e. >> we inherit state from bootloader) and provides support for all >> peripherals that support simple one-bit gated clocks. The covers all >> peripherals whose clocks come from the AHB, APB1 or APB2 buses. >> >> It has been tested on an STM32F429I-Discovery board. The clock counts >> for TIM2, USART1 and SYSTICK are all set correctly and the wall clock >> looks OK when checked with a stopwatch. I have also tested a prototype >> driver for the RNG hardware. The RNG clock is correctly enabled by the >> framework (also did inverse test and proved that by changing DT to >> configure the wrong clock bit then we observe the RNG driver to fail). >> >> Signed-off-by: Daniel Thompson >> Reviewed-by: Maxime Coquelin > > I also squashed in some sparse fixes. Please check. That was extremely generous! Thanks. The changes all eyeball OK but I'll double check things tonight just in case. Daniel. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/