Date: Wed, 24 Jun 2015 14:08:20 +0200
From: Christoph Hellwig <hch@lst.de>
To: Richard Weinberger <richard@nod.at>
Cc: Christoph Hellwig <hch@lst.de>, Dan Williams <dan.j.williams@intel.com>,
        arnd@arndb.de, mingo@redhat.com, bp@alien8.de, hpa@zytor.com,
        tglx@linutronix.de, ross.zwisler@linux.intel.com,
        akpm@linux-foundation.org, jgross@suse.com, x86@kernel.org,
        toshi.kani@hp.com, linux-nvdimm@ml01.01.org, benh@kernel.crashing.org,
        mcgrof@suse.com, konrad.wilk@oracle.com, linux-kernel@vger.kernel.org,
        stefan.bader@canonical.com, luto@amacapital.net, linux-mm@kvack.org,
        geert@linux-m68k.org, ralf@linux-mips.org, hmh@hmh.eng.br,
        mpe@ellerman.id.au, tj@kernel.org, paulus@samba.org
Subject: Re: [PATCH v5 6/6] arch, x86: pmem api for ensuring durability of
	persistent memory updates
Message-ID: <20150624120820.GA17542@lst.de>
References: <20150622081028.35954.89885.stgit@dwillia2-desk3.jf.intel.com> <20150622082449.35954.91411.stgit@dwillia2-desk3.jf.intel.com> <20150622161754.GC8240@lst.de> <5589374D.9060009@nod.at>
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On Tue, Jun 23, 2015 at 12:39:09PM +0200, Richard Weinberger wrote:
> Not sure if I understand this correctly, is the plan to support pmem also on UML?
> At least drivers/block/pmem.c cannot work on UML as it depends on io memory.
> 
> Only x86 seems to have ARCH_HAS_NOCACHE_UACCESS, if UML would offer these methods
> what drivers need them? I'm still not sure where it would make sense on UML as
> uaccess on UML means ptrace() between host and guest process.

Ok, that makese snese.  Dan, how about just moving the new pmem helpers
from cacheflush.h to a new asm/pmem.h to avoid having them dragged into
the um build?
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