Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755301AbbF0OR0 (ORCPT ); Sat, 27 Jun 2015 10:17:26 -0400 Received: from mga03.intel.com ([134.134.136.65]:17770 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753843AbbF0ORT (ORCPT ); Sat, 27 Jun 2015 10:17:19 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,689,1427785200"; d="scan'208";a="718684544" Date: Sat, 27 Jun 2015 19:48:58 +0530 From: Vinod Koul To: Appana Durga Kedareswara Rao Cc: "dan.j.williams@intel.com" , Michal Simek , Soren Brinkmann , Anirudha Sarangi , Punnaiah Choudary Kalluri , "dmaengine@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Srikanth Thokala Subject: Re: [PATCH v5 2/2] dma: Add Xilinx AXI Central Direct Memory Access Engine driver support Message-ID: <20150627141858.GV19530@localhost> References: <1433839690-5491-1-git-send-email-appanad@xilinx.com> <20150622101527.GB19530@localhost> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1870 Lines: 43 On Wed, Jun 24, 2015 at 05:12:12PM +0000, Appana Durga Kedareswara Rao wrote: Please *fix* you MUA to wrap lines properly > > > + > > > + if (cfg->reset) > > > + return xilinx_cdma_chan_reset(chan); > > Why do you want to reset this externally, that sounds bad to me > If someone (client driver) want to reset the controller externally. It will be useful right? And why would they want to do that? There might be some other clients using other channels, doesnt sound good design to me. What is the motivation here... > > > > > > > + > > > + if (cfg->coalesc <= XILINX_CDMA_COALESCE_MAX) { > > > + reg &= ~XILINX_CDMA_XR_COALESCE_MASK; > > > + reg |= cfg->coalesc << XILINX_CDMA_COALESCE_SHIFT; > > > + } > > Can you explain what coalesc means here? > > Coalesc means interrupt threshold > This value is used for setting the interrupt threshold. When IOC (interrupt on complete) interrupt events occur, an internal counter > Counts down from the Interrupt Threshold setting. When the count reaches zero, an interrupt out is generated by the DMA engine. > This will be useful in case of SG transfer. IIUC, on IOC controller will count this threshold and then generate interrupt out? > > This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. > Thats cute! -- ~Vinod -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/