Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755406AbbF0OjV (ORCPT ); Sat, 27 Jun 2015 10:39:21 -0400 Received: from mga02.intel.com ([134.134.136.20]:51683 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753504AbbF0OjN (ORCPT ); Sat, 27 Jun 2015 10:39:13 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,689,1427785200"; d="scan'208";a="515130833" Date: Sat, 27 Jun 2015 20:10:54 +0530 From: Vinod Koul To: Appana Durga Kedareswara Rao Cc: "dan.j.williams@intel.com" , Michal Simek , Soren Brinkmann , Anirudha Sarangi , Punnaiah Choudary Kalluri , "dmaengine@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Srikanth Thokala Subject: Re: [PATCH v7] dma: Add Xilinx AXI Direct Memory Access Engine driver support Message-ID: <20150627144054.GW19530@localhost> References: <1433831736-18253-1-git-send-email-appanad@xilinx.com> <20150622104932.GC19530@localhost> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1877 Lines: 42 On Wed, Jun 24, 2015 at 05:12:13PM +0000, Appana Durga Kedareswara Rao wrote: > > where is the hardware addr programmed? I can see you are using sg list > > passed for porgramming one side of a transfer where is other side > > programmed? > > The actual programming happens in the start_transfer(I mean in issue_pending) API > There are two modes > > All the h/w addresses are configured in the start_transfer API. > > In simple transfer Mode the below write triggers the transfer > dma_ctrl_write(chan, XILINX_DMA_REG_BTT, > hw->control & XILINX_DMA_MAX_TRANS_LEN); > > In SG Mode the below write triggers the transfer. > dma_ctrl_write(chan, XILINX_DMA_REG_TAILDESC, tail->phys); > > There are two Channels MM2S (Memory to device) and S2MM (Device to Memory) channel. > --> In MM2S case we need to configure the SOF (Start of frame) for the first BD and we need to set EOF(end of frame) for the last BD > --> For S2MM case no need to configure SOF and EOF. Once we got the IOC interrupt will call mark the cookie as complete and will > Call the user callback. There users checks for the data. > > Please let me know if you are not clear. No sorry am not... I asked how the device address in configured. For both MM2S S2MM you are using sg for memory address, where are you getting device adress, are you assuming/hardcoding or getting somehow, if so how? > > no dma_slave_config handler? > No need of this callback earlier in the dma_slave_config we are doing terminate_all > Now we have a separate API for that so no need to have this call back. The question was on parameters -- ~Vinod -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/