Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752649AbbF3SXY (ORCPT ); Tue, 30 Jun 2015 14:23:24 -0400 Received: from mail-pd0-f174.google.com ([209.85.192.174]:34216 "EHLO mail-pd0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751544AbbF3SXO (ORCPT ); Tue, 30 Jun 2015 14:23:14 -0400 From: Duc Dang To: Bjorn Helgaas , Catalin Marinas , Ian Campbell , Pawel Moll , Rob Herring , Mark Rutland , Kumar Gala , Will Deacon , "David S. Miller" Cc: devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tanmay Inamdar , patches@apm.com, Duc Dang Subject: [PATCH v2 0/2] pci: xgene: Add multiple memory ranges support Date: Tue, 30 Jun 2015 11:22:26 -0700 Message-Id: X-Mailer: git-send-email 1.9.1 In-Reply-To: <46305464.n5SOjGAhJb@wuerfel> References: <46305464.n5SOjGAhJb@wuerfel> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 970 Lines: 24 This patch set adds 1 large (up to 64GB) memory window for each PCIe controller nodes in X-Gene device tree and fix PCIe controller driver to handle multiple memory ranges correctly. These changes are required to support PCIe devices that has huge BAR. v2 changes: 1. Separate device-tree changes and driver changes into different patches 2. Explicitly define new large window as 64-bit prefetchable in dts 3. Use IORESOURCE_PREFETCH flag to determine which PCIe controller register to be used to configure the memory ranges. arch/arm64/boot/dts/apm/apm-storm.dtsi | 23 ++++++++++++++--------- drivers/pci/host/pci-xgene.c | 12 ++++++++++-- 2 files changed, 24 insertions(+), 11 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/