Message-ID: <55937F74.1020801@topic.nl>
Date: Wed, 1 Jul 2015 07:49:40 +0200
From: Mike Looijmans <mike.looijmans@topic.nl>
Organization: TOPIC
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CC: "git@xilinx.com" <git@xilinx.com>,
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        "dwmw2@infradead.org" <dwmw2@infradead.org>,
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        "linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>
Subject: Re: [PATCH] mtd: spi-nor: Only set Micron quad-read mode when controller
 in 4-lane TX mode
References: <1435663042-25425-1-git-send-email-mike.looijmans@topic.nl> <A765B125120D1346A63912DDE6D8B6310BF3651A@NTXXIAMBX02.xacn.micron.com>
In-Reply-To: <A765B125120D1346A63912DDE6D8B6310BF3651A@NTXXIAMBX02.xacn.micron.com>
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﻿On 01-07-15 04:19, Bean Huo 霍斌斌 (beanhuo) wrote:
>> drivers/mtd/spi-nor/spi-nor.c | 2 ++
>> 1 file changed, 2 insertions(+)
> 
>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index e8f6131..10ba94f 100644
>> --- a/drivers/mtd/spi-nor/spi-nor.c
>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>> @@ -1398,6 +1398,8 @@ static int set_quad_mode(struct spi_nor *nor, struct flash_info *info)
>   >		}
>   >		return status;
>   >	case CFI_MFR_ST:
>> +		if (!(nor->spi->mode & SPI_TX_QUAD))
>> +			return 0;
> I think, this action should be done before callback set_quad_mode,and add some codes in
> Spi controller driver.what is more,how do you get spi member in spi_nor?seems no this member.

Too many changes between the Xilinx tree and mainline. My patch isn't for
mainline, I'll make a new one.

> I have one concern that as long as spi nor be configed into quad mode,spi controller must be also
> immediately Transfer into quad mode, otherwise read status will be fail.

The original commit that added the micron Quad mode did not do this. I wonder
how this was tested, because it could never have worked on any setup I'm aware
of. After setting the "quad mode" bit in volatile config, the controller needs
to start sending commands on all 4 lanes.
Even if it succeeds in doing that, a soft reset (e.g. unloading/loading the
driver, or kexec to another kernel) will bring the system in a state where the
controller will use 1 lane for commands while the chip expects 4, thus
breaking all communication.

Having slept and pondered about this, I suggest plainly removing the Micron
Quad mode code, because it is just broken and can never work. There's no
actual performance advantage here, apart from just saving a few clocks on
commands, which would be less than 0.1% on a 1k data read.

> But setting spi controller layer(driver/spi/) and configure spi nor layer(driver/mtd/spi-nor)
>   are not the same mtd layer,I found that it's hard to do.
> But for new structure spi controller(such as driver/mtd/spi-nor/fsl-quadspi.c) is very reasonable.and
> it can be easy to set spi controller and spi nor into quad mode at the same time.

I'm sorry, but I didn't understand what you meant  here.


Kind regards,

Mike Looijmans
System Expert

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