Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755745AbbGCQHt (ORCPT ); Fri, 3 Jul 2015 12:07:49 -0400 Received: from mail-wg0-f41.google.com ([74.125.82.41]:34098 "EHLO mail-wg0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755279AbbGCQHp (ORCPT ); Fri, 3 Jul 2015 12:07:45 -0400 References: <1435775343-20034-1-git-send-email-alex.bennee@linaro.org> <1435775343-20034-10-git-send-email-alex.bennee@linaro.org> <20150702084847.GB3418@arm.com> <87pp4asm6u.fsf@linaro.org> <20150703092323.GA1588@arm.com> From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Will Deacon Cc: "kvm@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "kvmarm@lists.cs.columbia.edu" , "christoffer.dall@linaro.org" , Marc Zyngier , "peter.maydell@linaro.org" , "agraf@suse.de" , "drjones@redhat.com" , "pbonzini@redhat.com" , "zhichao.huang@linaro.org" , "jan.kiszka@siemens.com" , "dahi@linux.vnet.ibm.com" , "r65777@freescale.com" , "bp@suse.de" , Gleb Natapov , Jonathan Corbet , Catalin Marinas , Lorenzo Pieralisi , Ingo Molnar , Peter Zijlstra , "open list:DOCUMENTATION" , open list , "open list:ABI/API" Subject: Re: [PATCH v7 09/11] KVM: arm64: guest debug, HW assisted debug support In-reply-to: <20150703092323.GA1588@arm.com> Date: Fri, 03 Jul 2015 17:07:41 +0100 Message-ID: <87h9plrzqq.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2011 Lines: 58 Will Deacon writes: > Hi Alex, > > On Thu, Jul 02, 2015 at 02:50:33PM +0100, Alex Bennée wrote: >> Are you happy with this?: > > [...] > >> +/** >> + * kvm_arch_dev_ioctl_check_extension >> + * >> + * We currently assume that the number of HW registers is uniform >> + * across all CPUs (see cpuinfo_sanity_check). >> + */ >> int kvm_arch_dev_ioctl_check_extension(long ext) >> { >> int r; >> @@ -64,6 +71,12 @@ int kvm_arch_dev_ioctl_check_extension(long ext) >> case KVM_CAP_ARM_EL1_32BIT: >> r = cpu_has_32bit_el1(); >> break; >> + case KVM_CAP_GUEST_DEBUG_HW_BPS: >> + r = hw_breakpoint_slots(TYPE_INST); >> + break; >> + case KVM_CAP_GUEST_DEBUG_HW_WPS: >> + r = hw_breakpoint_slots(TYPE_DATA); >> + break; > > Whilst I much prefer this code, it actually adds an unwanted dependency > on PERF_EVENTS that I didn't think about to start with. Sorry to keep > messing you about -- I guess your original patch is the best thing after > all. Everything looks to be in hw_breakpoint.[ch] which does depend on CONFIG_HAVE_HW_BREAKPOINT which depends on PERF_EVENTS to be built. However the previous code depended on this behaviour as well. It would seem weird to enable guest debug using HW debug registers to debug the guest yet not allowing the host kernel to use them? Of course this is the only code they would share as all the magic of guest debugging is already mostly there for dirty guest handling. I'm not familiar with Kconfig but it looks like this is all part of arm64 defconfig. Are people really going to want to disable PERF_EVENTS but still debug their guests with HW support? > > Will -- Alex Bennée -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/