Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752096AbbGFFMM (ORCPT ); Mon, 6 Jul 2015 01:12:12 -0400 Received: from mail-oi0-f54.google.com ([209.85.218.54]:36407 "EHLO mail-oi0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751001AbbGFFMF (ORCPT ); Mon, 6 Jul 2015 01:12:05 -0400 MIME-Version: 1.0 In-Reply-To: References: <1434074005-18846-1-git-send-email-k.kozlowski@samsung.com> Date: Mon, 6 Jul 2015 14:12:04 +0900 Message-ID: Subject: Re: [PATCH v2] clk: exynos4: Fix wrong clock for Exynos4x12 ADC From: Tomasz Figa To: Krzysztof Kozlowski Cc: Sylwester Nawrocki , "linux-samsung-soc@vger.kernel.org" , Mike Turquette , Stephen Boyd , Javier Martinez Canillas , stable@vger.kernel.org, Linux Kernel , Kukjin Kim , linux-clk@vger.kernel.org, "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2592 Lines: 63 2015-07-06 13:03 GMT+09:00 Krzysztof Kozlowski : > 2015-06-12 14:46 GMT+09:00 Javier Martinez Canillas : >> Hello Krzysztof, >> >> On Fri, Jun 12, 2015 at 3:53 AM, Krzysztof Kozlowski >> wrote: >>> The TSADC gate clock was used in Exynos4x12 DTSI for exynos-adc driver. >>> However TSADC is present only on Exynos4210 so on Trats2 board (with >>> Exynos4412 SoC) the exynos-adc driver could not be probed: >>> ERROR: could not get clock /adc@126C0000:adc(0) >>> exynos-adc 126c0000.adc: failed getting clock, err = -2 >>> exynos-adc: probe of 126c0000.adc failed with error -2 >>> >>> Instead on Exynos4x12 SoCs the main clock used by Analog to Digital >>> Converter is located in different register and it is named in datasheet >>> as PCLK_ADC. Regardless of the name the purpose of this PCLK_ADC clock >>> is the same as purpose of TSADC from Exynos4210. >>> >>> The patch adds gate clock for Exynos4x12 using the proper register so >>> backward compatibility is preserved. This fixes the probe of exynos-adc >>> driver on Exynos4x12 boards and allows accessing sensors connected to it >>> on Trats2 board (ntc,ncp15wb473 AP and battery thermistors). >>> >>> Signed-off-by: Krzysztof Kozlowski >>> Cc: >>> Fixes: c63c57433003 ("ARM: dts: Add ADC's dt data to read raw data for exynos4x12") >>> Link: https://lkml.org/lkml/2015/6/11/85 >>> >>> --- >>> >>> Changes since v1: >>> 1. After discussion on LKML this solution was chosen because it smaller, >>> simpler, self-contained (one patch to fix issue) and maintains backward >>> compatibility. Thanks to Javier Martinez Canillas and Tomasz Figa for >>> valuable comments. >>> 2. Dropped patch 2/2 because now it is not needed. The clock id "TSADC" >>> will be used on all Exynos4 boards. >>> 3. Added CC-stable. >>> --- >>> drivers/clk/samsung/clk-exynos4.c | 2 ++ >>> 1 file changed, 2 insertions(+) >>> >> >> Patch looks good to me. >> >> Reviewed-by: Javier Martinez Canillas > > Hi Tomasz and Sylwester, > > Any comments on this version of patch? > Tomasz, you gave me comments on previous version. Are their satisfied? Acked-by: Tomasz Figa Thanks for pinging. Best regards, Tomasz -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/