Date: Mon, 6 Jul 2015 15:42:24 +0800
From: Herbert Xu <herbert@gondor.apana.org.au>
To: Felipe Balbi <balbi@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>, linux-crypto@vger.kernel.org,
        davem@davemloft.net, linux-omap@vger.kernel.org,
        linux-kernel@vger.kernel.org, t-kristo@ti.com, nsekhar@ti.com
Subject: Re: [PATCH 04/10] crypto: omap-aes: Use BIT() macro
Message-ID: <20150706074224.GD20192@gondor.apana.org.au>
References: <1435814320-30347-1-git-send-email-lokeshvutla@ti.com>
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 <20150702075903.GD4033@saruman.tx.rr.com>
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On Thu, Jul 02, 2015 at 02:59:03AM -0500, Felipe Balbi wrote:
> On Thu, Jul 02, 2015 at 10:48:34AM +0530, Lokesh Vutla wrote:
> > Use BIT()/GENMASK() macros for all register definitions instead of
> > hand-writing bit masks.
> > 
> > Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
> > ---
> >  drivers/crypto/omap-aes.c |   36 ++++++++++++++++++------------------
> >  1 file changed, 18 insertions(+), 18 deletions(-)
> > 
> > diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
> > index 96fc7f7..d974ab6 100644
> > --- a/drivers/crypto/omap-aes.c
> > +++ b/drivers/crypto/omap-aes.c
> > @@ -52,30 +52,30 @@
> >  #define AES_REG_IV(dd, x)		((dd)->pdata->iv_ofs + ((x) * 0x04))
> >  
> >  #define AES_REG_CTRL(dd)		((dd)->pdata->ctrl_ofs)
> > -#define AES_REG_CTRL_CTR_WIDTH_MASK	(3 << 7)
> > -#define AES_REG_CTRL_CTR_WIDTH_32		(0 << 7)
> > -#define AES_REG_CTRL_CTR_WIDTH_64		(1 << 7)
> > -#define AES_REG_CTRL_CTR_WIDTH_96		(2 << 7)
> > -#define AES_REG_CTRL_CTR_WIDTH_128		(3 << 7)
> > -#define AES_REG_CTRL_CTR		(1 << 6)
> > -#define AES_REG_CTRL_CBC		(1 << 5)
> > -#define AES_REG_CTRL_KEY_SIZE		(3 << 3)
> > -#define AES_REG_CTRL_DIRECTION		(1 << 2)
> > -#define AES_REG_CTRL_INPUT_READY	(1 << 1)
> > -#define AES_REG_CTRL_OUTPUT_READY	(1 << 0)
> > -#define AES_REG_CTRL_MASK		FLD_MASK(24, 2)
> > +#define AES_REG_CTRL_CTR_WIDTH_MASK	GENMASK(8, 7)
> > +#define AES_REG_CTRL_CTR_WIDTH_32	0
> > +#define AES_REG_CTRL_CTR_WIDTH_64	BIT(7)
> > +#define AES_REG_CTRL_CTR_WIDTH_96	BIT(8)
> > +#define AES_REG_CTRL_CTR_WIDTH_128	GENMASK(8, 7)
> > +#define AES_REG_CTRL_CTR		BIT(6)
> > +#define AES_REG_CTRL_CBC		BIT(5)
> > +#define AES_REG_CTRL_KEY_SIZE		GENMASK(4, 3)
> > +#define AES_REG_CTRL_DIRECTION		BIT(2)
> > +#define AES_REG_CTRL_INPUT_READY	BIT(1)
> > +#define AES_REG_CTRL_OUTPUT_READY	BIT(0)
> > +#define AES_REG_CTRL_MASK		GENMASK(24, 2)
> 
> this was defined a couple patches ago, why didn't you define it with
> GENMASK() to start with ?

Indeed, this should be folded into the earlier patch.

Thanks,
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
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