Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934993AbbGHPQP (ORCPT ); Wed, 8 Jul 2015 11:16:15 -0400 Received: from foss.arm.com ([217.140.101.70]:41706 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933627AbbGHPQL (ORCPT ); Wed, 8 Jul 2015 11:16:11 -0400 Message-ID: <559D3EB5.4060408@arm.com> Date: Wed, 08 Jul 2015 16:16:05 +0100 From: Marc Zyngier Organization: ARM Ltd User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Icedove/31.7.0 MIME-Version: 1.0 To: "majun (F)" , Thomas Gleixner CC: Catalin Marinas , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Will Deacon , Mark Rutland , "jason@lakedaemon.net" , "lizefan@huawei.com" , "huxinwei@huawei.com" , "dingtianhong@huawei.com" , "zhaojunhua@hisilicon.com" , "liguozhu@hisilicon.com" , "xuwei5@hisilicon.com" , "wei.chenwei@hisilicon.com" , "guohanjun@huawei.com" , "wuyun.wu@huawei.com" , "guodong.xu@linaro.org" , "haojian.zhuang@linaro.org" , "zhangfei.gao@linaro.org" , "usman.ahmad@linaro.org" Subject: Re: [PATCH v3 1/3] IRQ/Gic-V3: Add mbigen driver to support mbigen interrupt controller References: <1436166548-34920-1-git-send-email-majun258@huawei.com> <1436166548-34920-2-git-send-email-majun258@huawei.com> <559CA530.2090508@huawei.com> In-Reply-To: <559CA530.2090508@huawei.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2202 Lines: 66 On 08/07/15 05:21, majun (F) wrote: > Hi Thomas: > > 在 2015/7/6 20:33, Thomas Gleixner 写道: >> On Mon, 6 Jul 2015, Ma Jun wrote: >> > >>> +/** >>> + * get_mbigen_node_type: get the mbigen node type >>> + * @nid: the mbigen node value >>> + * return 0: evnent id of interrupt connected to this node can be changed. >>> + * return 1: evnent id of interrupt connected to this node cant be changed. >>> + */ >>> +static int get_mbigen_node_type(int nid) >>> +{ >>> + if (nid > MG_NR) { >>> + pr_warn("MBIGEN: Device ID exceeds max number!\n"); >>> + return 1; >>> + } >>> + if ((nid == 0) || (nid == 5) || (nid > 7)) >>> + return 0; >>> + else >>> + return 1; >> >> Oh no. We do not hardcode such properties into a driver. That wants to >> be in the device tree and set as a property in the node data structure. >> > Ok,I will move this to device tree > >>> +static int mbigen_write_msg(struct irq_data *d, struct msi_msg *msg) >>> +{ >>> + struct mbigen_chip *chip = d->domain->host_data; >>> + void __iomem *addr; >>> + u32 nid, val, offset; >>> + int ret = 0; >>> + >>> + nid = GET_NODE_NUM(d->hwirq); >>> + ret = get_mbigen_node_type(nid); >>> + if (ret) >>> + return 0; >> >> Care to explain what this does? It seems for some nodes you cannot >> write the msi message. So how is that supposed to work? How is that >> interrupt controlled (mask/unmask ...) ? >> > This function is used to write irq event id into vector register.Depends on > hardware design, write operation is permitted in some mbigen node(nid=0,5,and >7), > For other mbigen node, this register is read only. So how do you expect this to work? You cannot program the event generated by the mbigen, and the ITS has an ITT that probably doesn't match your HW. Best case, the interrupt is simply dropped, worse case you end up in an interrupt storm because you can't figure out which device is screaming. I'm a bit puzzled. M. -- Jazz is not dead. It just smells funny... -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/