Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752343AbbGMJXP (ORCPT ); Mon, 13 Jul 2015 05:23:15 -0400 Received: from mga11.intel.com ([192.55.52.93]:9763 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751267AbbGMJXN (ORCPT ); Mon, 13 Jul 2015 05:23:13 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,461,1432623600"; d="scan'208";a="605112033" Message-ID: <1436779390.2533.20.camel@loki> Subject: Re: [alsa-devel] [PATCH v3] ASoC: Add support for NAU8825 codec to ASoC From: Liam Girdwood To: Chih-Chiang Chang Cc: Mark Brown , "tiwai@suse.de" , AP MS30 Linux ALSA , Lars-Peter Clausen , "lgirdwood@gmail.com" , AP MS30 Linux Kernel community Date: Mon, 13 Jul 2015 10:23:10 +0100 In-Reply-To: <55A369B2.5040500@nuvoton.com> References: <55A369B2.5040500@nuvoton.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1845 Lines: 49 On Mon, 2015-07-13 at 15:33 +0800, Chih-Chiang Chang wrote: > +static void set_sys_clk(struct snd_soc_codec *codec, int sys_clk) > +{ > + struct nau8825_priv *nau8825 = snd_soc_codec_get_drvdata(codec); > + > + pr_debug("%s :: sys_clk=%x\n", __func__, sys_clk); > + switch (sys_clk) { > + case NAU8825_INTERNALCLOCK: > + regmap_update_bits(nau8825->regmap, NAU8825_CLK_DIVIDER, > + NAU8825_SYSCLK_EN_MASK, NAU8825_SYSCLK_DIS); > + regmap_update_bits(nau8825->regmap, NAU8825_FLL_6, > + NAU8825_DCO_EN_MASK, NAU8825_DCO_EN); > + regmap_update_bits(nau8825->regmap, NAU8825_CLK_DIVIDER, > + NAU8825_SYSCLK_EN_MASK, NAU8825_SYSCLK_EN); > + break; > + case NAU8825_MCLK: > + default: > + regmap_update_bits(nau8825->regmap, NAU8825_FLL_6, > + NAU8825_DCO_EN_MASK, NAU8825_DCO_DIS); > + regmap_update_bits(nau8825->regmap, NAU8825_I2S_PCM_CTRL_2, > + NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_SLAVE); > + /* FLL clock source from MCLK */ > + regmap_update_bits(nau8825->regmap, NAU8825_CLK_DIVIDER, > + NAU8825_SYSCLK_EN_MASK, NAU8825_SYSCLK_DIS); > + mdelay(2); Probably best to sleep here rather than block, especially if this code will be used in init/PM sequences. Btw, is there anyway to check whether the FLL actually achieves lock after the 2ms ? > + regmap_update_bits(nau8825->regmap, NAU8825_CLK_DIVIDER, > + NAU8825_SYSCLK_EN_MASK, NAU8825_SYSCLK_EN); > + break; > + } > +} > + Thanks Liam -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/