Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754453AbbGQV1E (ORCPT ); Fri, 17 Jul 2015 17:27:04 -0400 Received: from mail-by2on0085.outbound.protection.outlook.com ([207.46.100.85]:52096 "EHLO na01-by2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752170AbbGQV06 (ORCPT ); Fri, 17 Jul 2015 17:26:58 -0400 Authentication-Results: spf=fail (sender IP is 66.35.236.227) smtp.mailfrom=opensource.altera.com; infradead.org; dkim=none (message not signed) header.d=none; Authentication-Results: pengutronix.de; dkim=none (message not signed) header.d=none; Date: Fri, 17 Jul 2015 16:22:07 -0500 From: atull X-X-Sender: atull@linuxheads99 To: Steffen Trumtrar CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Petr Cvek , , Subject: Re: [PATCH v9 3/7] staging: add bindings document for simple fpga bus In-Reply-To: <20150717194913.GD20836@pengutronix.de> Message-ID: References: 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X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 6118 Lines: 164 On Fri, 17 Jul 2015, Steffen Trumtrar wrote: > Hi! > > On Fri, Jul 17, 2015 at 10:51:13AM -0500, atull@opensource.altera.com wrote: > > From: Alan Tull > > > > New bindings document for simple fpga bus. > > > > Signed-off-by: Alan Tull > > --- > > .../Documentation/bindings/simple-fpga-bus.txt | 61 ++++++++++++++++++++ > > 1 file changed, 61 insertions(+) > > create mode 100644 drivers/staging/fpga/Documentation/bindings/simple-fpga-bus.txt > > > > diff --git a/drivers/staging/fpga/Documentation/bindings/simple-fpga-bus.txt b/drivers/staging/fpga/Documentation/bindings/simple-fpga-bus.txt > > new file mode 100644 > > index 0000000..221e781 > > --- /dev/null > > +++ b/drivers/staging/fpga/Documentation/bindings/simple-fpga-bus.txt > > @@ -0,0 +1,61 @@ > > +Simple FPGA Bus > > +=============== > > + > > +A Simple FPGA Bus is a bus that handles configuring an FPGA and its bridges > > +before populating the devices below its node. > > + > > +Required properties: > > +- compatible : should contain "simple-fpga-bus" > > +- #address-cells, #size-cells, ranges: must be present to handle address space > > + mapping for children. > > + > > +Optional properties: > > +- fpga-mgr : should contain a phandle to a fpga manager. > > +- fpga-firmware : should contain the name of a fpga image file located on the > > + firmware search path. > > +- partial-reconfig : boolean property should be defined if partial > > + reconfiguration is to be done. > > +- resets : should contain a list of resets that should be released after the > > + fpga has been programmed i.e. fpga bridges. > > +- reset-names : should contain a list of the names of the resets. > > + > > +Example: > > + > > +/dts-v1/; > > +/plugin/; > > +/ { > > + fragment@0 { > > + target-path="/soc"; > > + __overlay__ { > > + #address-cells = <1>; > > + #size-cells = <1>; > > + > > + bridge@0xff200000 { > > + compatible = "simple-fpga-bus"; > > + #address-cells = <0x2>; > > + #size-cells = <0x1>; > > + ranges = <0x1 0x10040 0xff210040 0x20>; > > + > > + clocks = <0x2 0x2>; > > + clock-names = "h2f_lw_axi_clock", "f2h_sdram0_clock"; > > + > > + fpga-mgr = <&hps_0_fpgamgr>; > > + fpga-firmware = "soc_system.rbf"; > > + > > + resets = <&hps_fpgabridge0 0>, <&hps_fpgabridge1 0>, <&hps_fpgabridge2 0>; > > + reset-names = "hps2fpga", "lwhps2fpga", "fpga2hps"; > > + > > + gpio@0x100010040 { > > + compatible = "altr,pio-14.0", "altr,pio-1.0"; > > + reg = <0x1 0x10040 0x20>; > > + clocks = <0x2>; > > + altr,gpio-bank-width = <0x4>; > > + resetvalue = <0x0>; > > + #gpio-cells = <0x2>; > > + gpio-controller; > > + }; > > + }; > > + }; > > + }; > > +}; > > + > > Just some quick thougths for the Socfpga case: > > What you are describing here is a virtual bus, that is not existing on > at least the Socfpga, right? I don't like this. > You are mixing different independent busses/devices into one and I don't > see why. Hi Steffen, It is a multi-interface bridge. It is likely that a device will use more than one at a time. This is normal in the kernel and the device tree supports it. My example is too simplistic. It is common for a device to use the lwh2f bridge for register access and the h2f bridge for data. So you'd have reg = <0xc0000000 0x20000000>, <0xff200000 0x00200000>; and ranges that map from those areas. > I see that this is just an example, but why > a) isn't the fpga-mgr the one knowing about the bitstream ? The fpga-mgr doesn't know much. Someone has to tell it what to load. I think that is a good thing. > You can't have two of these busses with different bitstreams anyway > And if you have multipe FPGAs you have multiple fpga-mgrs, no? You would have one fpga-mgr and a separate set of bridges per fpga. > b) shouldn't the h2f/lwh2f/f2h bridges be the "simple-bus devices" instead of > just reset-controllers ? That's an artificial division of things. These aren't really separate busses. You would have a device that needs to be the child of two separate bridges then. > What about e.g. the bus width of the bridges? > It can change depending on the bitstream. When I have an IP core that does > DMA I might want my driver to be able to configure the bus width accordingly. > There are other settings in the bridges that I can not set when they are just > reset controllers. I was hoping to avoid adding another framework to the kernel. Looks like a bus framework will be necessary that can be controlled by the simple fpga bus. I'd add simple fpga bus DT bindings like bridges = <&hps_fpgabridge0>, <&hps_fpgabridge1>; The bindings for the bridges have already been proposed (you didn't like them) and could be used in the overlay here to change bus width. https://lkml.org/lkml/2014/10/23/681 I'll revive those patches, but tear out the sysfs interface and just export API's for enabling/disabling bridges that I could call from simple-fpga-bus.c Alan > > I can understand that this is just an example, but again for the Socfpga case it > is IMHO wrong. I don't know about e.g. the Zynq without researching, though. > > Regards, > Steffen > > -- > Pengutronix e.K. | | > Industrial Linux Solutions | http://www.pengutronix.de/ | > Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | > Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | > -- > To unsubscribe from this list: send the line "unsubscribe linux-kernel" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > Please read the FAQ at http://www.tux.org/lkml/ > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/