Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754020AbbGQXw6 (ORCPT ); Fri, 17 Jul 2015 19:52:58 -0400 Received: from mail-wg0-f46.google.com ([74.125.82.46]:32841 "EHLO mail-wg0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753712AbbGQXw5 (ORCPT ); Fri, 17 Jul 2015 19:52:57 -0400 MIME-Version: 1.0 In-Reply-To: <20150717233100.GN7380@tassilo.jf.intel.com> References: <1435612935-24425-1-git-send-email-andi@firstfloor.org> <1435612935-24425-3-git-send-email-andi@firstfloor.org> <20150717200900.GE7380@tassilo.jf.intel.com> <20150717203315.GI7380@tassilo.jf.intel.com> <20150717211955.GK7380@tassilo.jf.intel.com> <20150717233100.GN7380@tassilo.jf.intel.com> Date: Fri, 17 Jul 2015 16:52:56 -0700 Message-ID: Subject: Re: [PATCH 3/3] x86, perf: Add PEBS frontend profiling for Skylake From: Stephane Eranian To: Andi Kleen Cc: Thomas Gleixner , Andi Kleen , Peter Zijlstra , LKML Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3166 Lines: 79 On Fri, Jul 17, 2015 at 4:31 PM, Andi Kleen wrote: > On Fri, Jul 17, 2015 at 03:00:18PM -0700, Stephane Eranian wrote: >> Andi, >> >> On Fri, Jul 17, 2015 at 2:19 PM, Andi Kleen wrote: >> >> But then, the SDM is misleading. It is not describing what's >> >> implemented for SKL. >> > >> > Actually it has a list of valid values you can put into the various fields. >> > None of them have the bits set you're trying to set. >> > >> You are talking about the events (bit 0-7). I am talking about the bubble >> thresholds. I am okay with the event list for bits 0-7. > > Fair enough. There's a one-off in the MSR table and table 18-54. The IDQ > bubble width is only 21:20. I'll ask for that to be fixed in both places > that document them. > There is still something broken here, if bit 22 is not implemented, then you have a bunch of frontend events in the SKL event table (download.01.org) which are bogus: { "EventCode": "0xC6", "UMask": "0x01", "EventName": "FRONTEND_RETIRED.LATENCY_GE_8", "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 8 cycles which was not interrupted by a back-end stall.", "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 8 cycles which was not interrupted by a back-end stall.", "Counter": "0,1,2,3", "CounterHTOff": "0,1,2,3", "SampleAfterValue": "100007", "MSRIndex": "0x3F7", "MSRValue": "0x400806", <========= .... }, { "EventCode": "0xC6", "UMask": "0x01", "EventName": "FRONTEND_RETIRED.LATENCY_GE_16", "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.", "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.", "Counter": "0,1,2,3", "CounterHTOff": "0,1,2,3", "SampleAfterValue": "100007", "MSRIndex": "0x3F7", "MSRValue": "0x401006", <===== ... }, { "EventCode": "0xC6", "UMask": "0x01", "EventName": "FRONTEND_RETIRED.LATENCY_GE_32", "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 32 cycles which was not interrupted by a back-end stall.", "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 32 cycles which was not interrupted by a back-end stall.", "Counter": "0,1,2,3", "CounterHTOff": "0,1,2,3", "SampleAfterValue": "100007", "MSRIndex": "0x3F7", "MSRValue": "0x402006", <========= ... }, -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/