Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964784AbbGUXlK (ORCPT ); Tue, 21 Jul 2015 19:41:10 -0400 Received: from mailout4.w1.samsung.com ([210.118.77.14]:40657 "EHLO mailout4.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932779AbbGUXlI (ORCPT ); Tue, 21 Jul 2015 19:41:08 -0400 X-AuditID: cbfec7f4-f79c56d0000012ee-98-55aed890a4c8 Message-id: <55AED88D.2060009@samsung.com> Date: Wed, 22 Jul 2015 08:41:01 +0900 From: Krzysztof Kozlowski User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.8.0 MIME-version: 1.0 To: Stephen Boyd , Sylwester Nawrocki Cc: Tomasz Figa , Mike Turquette , Kukjin Kim , linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Javier Martinez Canillas , stable@vger.kernel.org Subject: Re: [PATCH v2] clk: exynos4: Fix wrong clock for Exynos4x12 ADC References: <1434074005-18846-1-git-send-email-k.kozlowski@samsung.com> <20150721224235.GA30021@codeaurora.org> In-reply-to: <20150721224235.GA30021@codeaurora.org> Content-type: text/plain; charset=windows-1252 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrPLMWRmVeSWpSXmKPExsVy+t/xq7oTbqwLNfh8Rdbi2u8ZbBavXxha 9D9+zWyx6fE1VouPPfdYLS7vmsNmMeP8PiaLpxMuslkcftPOavHjTDeLxYKNjxgtVu36w+jA 43G5r5fJ4+/sVmaPnbPusntsWtXJ5nHn2h42j81L6j36tqxi9Pi8SS6AI4rLJiU1J7MstUjf LoErY8bjP6wFB3grmmd2sTUwfubqYuTkkBAwkVgz4wArhC0mceHeerYuRi4OIYGljBItb18w QThfGCXW3pgKVsUroCVxcdts5i5GDg4WAVWJvul6IGE2AWOJzcuXsIHYogIREstXn2SEKBeU +DH5HguILSIQJnF99St2kJnMAgeYJDb8e80EMkdYwEOi55ElSI2QQKHEsf19YKs4gY7raZ8M topZQE/i/kUtkDCzgLzE5jVvmScwCsxCsmEWQtUsJFULGJlXMYqmliYXFCel5xrqFSfmFpfm pesl5+duYoREy5cdjIuPWR1iFOBgVOLhnXB0XagQa2JZcWXuIUYJDmYlEd6lJ4BCvCmJlVWp RfnxRaU5qcWHGKU5WJTEeefueh8iJJCeWJKanZpakFoEk2Xi4JRqYGSyW/Ns54QPUy0Pb3z1 L/S8e/8PE4vXGa91Zrz/Z6jlUxfltKbTaBnThexGW3XdZ5rtExIudy+TZ4lZkzq/4nBFQuln nwUNVvPtlJV4N3uwbQy8EKDL0HD62Bq19uLFmV4bnwTwsK69N/XS0TOzFzmsep6yjPegb6hm 1dy4QA4OrclPypqWNSuxFGckGmoxFxUnAgBK8G9tkgIAAA== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1932 Lines: 46 On 22.07.2015 07:42, Stephen Boyd wrote: > On 06/12, Krzysztof Kozlowski wrote: >> The TSADC gate clock was used in Exynos4x12 DTSI for exynos-adc driver. >> However TSADC is present only on Exynos4210 so on Trats2 board (with >> Exynos4412 SoC) the exynos-adc driver could not be probed: >> ERROR: could not get clock /adc@126C0000:adc(0) >> exynos-adc 126c0000.adc: failed getting clock, err = -2 >> exynos-adc: probe of 126c0000.adc failed with error -2 >> >> Instead on Exynos4x12 SoCs the main clock used by Analog to Digital >> Converter is located in different register and it is named in datasheet >> as PCLK_ADC. Regardless of the name the purpose of this PCLK_ADC clock >> is the same as purpose of TSADC from Exynos4210. >> >> The patch adds gate clock for Exynos4x12 using the proper register so >> backward compatibility is preserved. This fixes the probe of exynos-adc >> driver on Exynos4x12 boards and allows accessing sensors connected to it >> on Trats2 board (ntc,ncp15wb473 AP and battery thermistors). >> >> Signed-off-by: Krzysztof Kozlowski >> Cc: >> Fixes: c63c57433003 ("ARM: dts: Add ADC's dt data to read raw data for exynos4x12") >> Link: https://lkml.org/lkml/2015/6/11/85 >> > > Did you want clk maintainers to apply this? The To: list is not > helping so I'm not sure what's going on and it seems to have > slipped through the cracks. Thank you for being proactive! I appreciate this. Some time ago Sylwester replied that he took care about this patch so I think this will go through Samsung clock tree. Sylwester, are you planning to send this as fix for 4.2-rc? Best regards, Krzysztof -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/