Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965298AbbGVNYy (ORCPT ); Wed, 22 Jul 2015 09:24:54 -0400 Received: from mx1.redhat.com ([209.132.183.28]:36676 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755276AbbGVNYs (ORCPT ); Wed, 22 Jul 2015 09:24:48 -0400 Date: Wed, 22 Jul 2015 15:24:44 +0200 From: Jiri Olsa To: Matt Fleming Cc: Arnaldo Carvalho de Melo , linux-kernel@vger.kernel.org, Ingo Molnar , Andi Kleen , Vince Weaver , Matt Fleming , Peter Zijlstra Subject: Re: [RFC][PATCH] perf tests: Add Intel CQM and arch tests Message-ID: <20150722132444.GC28330@krava.brq.redhat.com> References: <1437561539-27939-1-git-send-email-matt@codeblueprint.co.uk> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1437561539-27939-1-git-send-email-matt@codeblueprint.co.uk> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2465 Lines: 62 On Wed, Jul 22, 2015 at 11:38:59AM +0100, Matt Fleming wrote: > From: Matt Fleming > > Peter reports that it's possible to trigger a WARN_ON_ONCE() in the > Intel CQM code by combining a hardware event and an Intel CQM (software) > event into a group. Unfortunately, the perf tools are not able to create > this bundle and we need to manually construct a test case. > > For posterity, record Peter's proof of concept test case in tools/perf > so that it presents a model for how we can perform architecture-specific > tests, or "arch tests", in perf in the future. > > The particular issue triggered in the test case is that when the counter > for the hardware event overflows and triggers a PMI we'll read both the > hardware event and the software event counters. Unfortunately, for CQM > that involves performing an IPI to read the CQM event counters on all > sockets, which in NMI context triggers the WARN_ON_ONCE(). > > This patch is marked as RFC because I'd really like to solicit opinions > on this approach and hear feedback on whether this is the correct way to > structure these arch tests. I realise that we've already got tests for > the TSC, etc that are x86-specific but I didn't want to change the order > of the tests (say, by moving test__perf_time_to_tsc() into ARCH_TESTS) > in case that broke some kind of ABI. I wouldn't consider the order of tests being ABI, let's break it and watch ;-) SNIP > diff --git a/tools/perf/arch/x86/include/arch-tests.h b/tools/perf/arch/x86/include/arch-tests.h > new file mode 100644 > index 000000000000..9d43f759e014 > --- /dev/null > +++ b/tools/perf/arch/x86/include/arch-tests.h > @@ -0,0 +1,13 @@ > +#ifndef ARCH_TESTS_H > +#define ARCH_TESTS_H > + > +/* Tests */ > +int test__intel_cqm_count_nmi_context(void); > + > +#define ARCH_TESTS \ > + { \ > + .desc = "Test intel cqm nmi context read", \ > + .func = test__intel_cqm_count_nmi_context, \ > + }, > + hum, I dont like much this being stuffed in macro, but dont have any technical reason against ;-) maybe we could add 'struct test arch_tests[]' array, that'd be initialized by each arch and executed in addition to the current 'struct test tests[]' jirka -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/