Date: Thu, 23 Jul 2015 11:56:38 -0400
From: Steven Rostedt <rostedt@goodmis.org>
To: Andy Lutomirski <luto@kernel.org>
Cc: X86 ML <x86@kernel.org>, linux-kernel@vger.kernel.org,
        Willy Tarreau <w@1wt.eu>, Borislav Petkov <bp@alien8.de>,
        Thomas Gleixner <tglx@linutronix.de>,
        Peter Zijlstra <peterz@infradead.org>,
        Linus Torvalds <torvalds@linux-foundation.org>
Subject: Re: [PATCH 1/5] x86/entry/32: Clean up enable_sep_cpu to prepare
 for 64-bit merge
Message-ID: <20150723115638.0b5dec78@gandalf.local.home>
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	<dd0e00a1ca7f2a1396f6fb16abe1690c4bb748bd.1437665045.git.luto@kernel.org>
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On Thu, 23 Jul 2015 08:31:39 -0700
Andy Lutomirski <luto@kernel.org> wrote:

> Switch from wrmsr to wrmsrl_safe to prepare to merge the 32-bit and
> 64-bit code, and use __KERNEL_CS explicitly to initialize
> MSR_IA32_SYSENTER_CS.  While we're at it, tweak the whitespace a
> bit.

Saying "prepare to merge the 32-bit and 64-bit" isn't that informative
to why this patch is needed. Can you please describe in the change log
what can fault with the wrmsr call, when we do the merge?

Thanks!

-- Steve


> 
> Signed-off-by: Andy Lutomirski <luto@kernel.org>
> ---
>  arch/x86/kernel/cpu/common.c | 12 +++++-------
>  1 file changed, 5 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
> index 922c5e0cea4c..9b3a43583f81 100644
> --- a/arch/x86/kernel/cpu/common.c
> +++ b/arch/x86/kernel/cpu/common.c
> @@ -1001,15 +1001,13 @@ void enable_sep_cpu(void)
>  	 * We cache MSR_IA32_SYSENTER_CS's value in the TSS's ss1 field --
>  	 * see the big comment in struct x86_hw_tss's definition.
>  	 */
> -
>  	tss->x86_tss.ss1 = __KERNEL_CS;
> -	wrmsr(MSR_IA32_SYSENTER_CS, tss->x86_tss.ss1, 0);
> -
> -	wrmsr(MSR_IA32_SYSENTER_ESP,
> -	      (unsigned long)tss + offsetofend(struct tss_struct, SYSENTER_stack),
> -	      0);
>  
> -	wrmsr(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32, 0);
> +	wrmsrl_safe(MSR_IA32_SYSENTER_CS, __KERNEL_CS);
> +	wrmsrl_safe(MSR_IA32_SYSENTER_ESP,
> +		    (unsigned long)tss +
> +		    offsetofend(struct tss_struct, SYSENTER_stack));
> +	wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32);
>  
>  out:
>  	put_cpu();

--
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