Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754112AbbGWQp7 (ORCPT ); Thu, 23 Jul 2015 12:45:59 -0400 Received: from mail-lb0-f177.google.com ([209.85.217.177]:33065 "EHLO mail-lb0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753845AbbGWQpu (ORCPT ); Thu, 23 Jul 2015 12:45:50 -0400 MIME-Version: 1.0 In-Reply-To: <20150723120650.2257cd8c@gandalf.local.home> References: <0ed9e2434ed6b0832b0f1b28407ad962f66893a7.1437665045.git.luto@kernel.org> <20150723120650.2257cd8c@gandalf.local.home> From: Andy Lutomirski Date: Thu, 23 Jul 2015 09:45:29 -0700 Message-ID: Subject: Re: [PATCH 3/5] x86/entry: Merge 32-bit and 64-bit sysenter setup code To: Steven Rostedt Cc: Andy Lutomirski , X86 ML , "linux-kernel@vger.kernel.org" , Willy Tarreau , Borislav Petkov , Thomas Gleixner , Peter Zijlstra , Linus Torvalds Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1953 Lines: 49 On Thu, Jul 23, 2015 at 9:06 AM, Steven Rostedt wrote: > On Thu, 23 Jul 2015 08:31:41 -0700 > Andy Lutomirski wrote: > > >> - if (!boot_cpu_has(X86_FEATURE_SEP)) >> + /* >> + * On 64-bit CPUs, enable SEP unconditionally. On Intel CPUs, >> + * it works and we use it. On AMD CPUs, the MSRs exist but EIP >> + * is truncated to 32 bits. This doesn't matter because AMD >> + * CPUs disallow SYSENTER in long mode. If AMD ever decides to >> + * support SYSENTER, then they'll have to fix the truncation >> + * issue, and this code will work as-is. >> + */ >> + >> + if (IS_ENABLED(CONFIG_X86_32) && !boot_cpu_has(X86_FEATURE_SEP)) >> goto out; >> >> +#ifdef CONFIG_X86_32 >> /* >> * We cache MSR_IA32_SYSENTER_CS's value in the TSS's ss1 field -- >> * see the big comment in struct x86_hw_tss's definition. >> */ >> tss->x86_tss.ss1 = __KERNEL_CS; >> +#endif >> >> wrmsrl_safe(MSR_IA32_SYSENTER_CS, __KERNEL_CS); >> wrmsrl_safe(MSR_IA32_SYSENTER_ESP, >> (unsigned long)tss + >> offsetofend(struct tss_struct, SYSENTER_stack)); >> +#ifdef CONFIG_X86_32 >> wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32); >> +#else >> + wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_compat); >> +#endif > > As an additional clean up, what impact would we have to just rename > entry_SYSENTER_compat to entry_SYSENTER_32 on x86_64? It would remove > the need for the above #ifdef logic. I asked Ingo that at one point. I bet that, if we can get the ABIs to match, then we can do that. --Andy -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/