Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753553AbbGWSKQ (ORCPT ); Thu, 23 Jul 2015 14:10:16 -0400 Received: from g9t5008.houston.hp.com ([15.240.92.66]:42996 "EHLO g9t5008.houston.hp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753070AbbGWSKN (ORCPT ); Thu, 23 Jul 2015 14:10:13 -0400 Message-ID: <1437674941.3214.325.camel@hp.com> Subject: Re: [PATCH] x86/panic/reboot: Flush processor caches during panic/reboot From: Toshi Kani To: Dan Williams Cc: "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , X86 ML , Borislav Petkov , "linux-kernel@vger.kernel.org" , "linux-nvdimm@lists.01.org" Date: Thu, 23 Jul 2015 12:09:01 -0600 In-Reply-To: References: <1437672810-9641-1-git-send-email-toshi.kani@hp.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.16.3 (3.16.3-2.fc22) Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2220 Lines: 54 On Thu, 2015-07-23 at 10:40 -0700, Dan Williams wrote: > On Thu, Jul 23, 2015 at 10:33 AM, Toshi Kani wrote: > > During power failure, Asynchronous DRAM Refresh (ADR) flushes > > the write buffer in memory controllers into NVDIMM, but does not > > flush processor caches. While the kernel and application code > > need to take care of processor cache flush, they may not be able > > to do so during panic or reboot. > > > > Add processor cache flush (wbinvd) to the stop-CPUs interfaces, > > native_stop_other_cpus() and nmi_shootdown_cpus(), which are > > called during panic and reboot as follows. These wbinvd()s are > > called on each CPU after its irq/APIC is disabled. > > > > - panic() > > + smp_send_stop() > > o native_stop_other_cpus() > > o stop_this_cpu() > > > > - native_machine_restart() > > - native_machine_halt() > > - native_machine_power_off() > > + native_machine_shutdown() > > + stop_other_cpus() > > o native_stop_other_cpus() > > o stop_this_cpu() > > > > - native_machine_crash_shutdown() > > + kdump_nmi_shootdown_cpus() > > o nmi_shootdown_cpus() > > o crash_nmi_callback() > > > > Note, the cpu offline path, mwait_play_dead(), already calls > > wbinvd(). > > > > If the application is already prepared for surprise power loss what > additional benefit is there to flushing caches on panic? In other > words, if the application needs this for correctness then it is broken > with respect to surprise power loss, otherwise these flushes are not > necessary. I agree that well-written applications should withstand with their own journaling mechanisms whey they access NVDIMM directly. But not all applications are well-written or perfect on this regard. msync does not flush processor caches at this point, either. So, we want to save all updates to NVDIMM as much as possible to minimize inconsistency. Thanks, -Toshi -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/