Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754066AbbGXKSs (ORCPT ); Fri, 24 Jul 2015 06:18:48 -0400 Received: from smtp52.i.mail.ru ([94.100.177.112]:57477 "EHLO smtp52.i.mail.ru" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753236AbbGXKSm (ORCPT ); Fri, 24 Jul 2015 06:18:42 -0400 Subject: Re: [PATCH v3 1/4] i2c: tegra: implement slave mode To: Wolfram Sang , Stephen Warren References: <1437424546-30405-1-git-send-email-danindrey@mail.ru> <1437424546-30405-2-git-send-email-danindrey@mail.ru> <20150724092720.GA1597@katana> Cc: devicetree@vger.kernel.org, devel@linuxdriverproject.org, linux-i2c@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, ac100@lists.launchpad.net, Laxman Dewangan , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Thierry Reding , Alexandre Courbot , Greg Kroah-Hartman , Julian Andres Klode , Marc Dietrich From: Andrey Danin Message-ID: <55B210F4.6030700@mail.ru> Date: Fri, 24 Jul 2015 13:18:28 +0300 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:38.0) Gecko/20100101 Thunderbird/38.1.0 MIME-Version: 1.0 In-Reply-To: <20150724092720.GA1597@katana> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit X-Mras: Ok Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1664 Lines: 47 On 24.07.2015 12:27, Wolfram Sang wrote: > Still doesn't work for me and I think I understand why. Do you run your > I2C controller in slave mode only? Yes. > That might work, but using it in > master/slave mode simultanously won't work yet as I see it: > > * After every transfer (as master), clocks get disabled. I assume the IP > core won't be able to detect its own address then. At the begin of my work on this patchset I even denied clock disable call if slave is registered (to minimize code that can affect transfer). If only slave mode is used, then this logic is not needed. > > * There is this code in tegra_i2c_init(): > > if (!i2c_dev->is_dvc) { > u32 sl_cfg = i2c_readl(i2c_dev, I2C_SL_CNFG); > sl_cfg |= I2C_SL_CNFG_NACK | I2C_SL_CNFG_NEWSL; > i2c_writel(i2c_dev, sl_cfg, I2C_SL_CNFG); > i2c_writel(i2c_dev, 0xfc, I2C_SL_ADDR1); > i2c_writel(i2c_dev, 0x00, I2C_SL_ADDR2); > > } > > It probably messes up the slave initialization in tegra_reg_slave(). > At least I see that the slave address gets overwritten when I peek > the register after boot. > tegra_i2c_init is called on probe and resume. Also it is called in case of xfer fail. If xfer is ok, then I think slave addr must be kept unchanged. > Does that make sense to you? As far as I understand it is a loopback mode. Probably it will not work (Stephen Warren already mentioned this). But we can try to run it. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/