Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754159AbbGXMj7 (ORCPT ); Fri, 24 Jul 2015 08:39:59 -0400 Received: from mail-bn1on0082.outbound.protection.outlook.com ([157.56.110.82]:11964 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752563AbbGXMjv (ORCPT ); Fri, 24 Jul 2015 08:39:51 -0400 X-Greylist: delayed 144145 seconds by postgrey-1.27 at vger.kernel.org; Fri, 24 Jul 2015 08:39:51 EDT Authentication-Results: spf=fail (sender IP is 66.35.236.227) smtp.mailfrom=opensource.altera.com; infradead.org; dkim=none (message not signed) header.d=none; Authentication-Results: denx.de; dkim=none (message not signed) header.d=none; Date: Fri, 24 Jul 2015 07:39:15 -0500 From: atull X-X-Sender: atull@atull-730U3E-740U3E To: Pavel Machek CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Petr Cvek , , Subject: Re: [PATCH v9 4/7] staging: fpga manager: add sysfs interface document In-Reply-To: <20150724081829.GA16790@amd> Message-ID: References: <1437148277-5405-1-git-send-email-atull@opensource.altera.com> <1437148277-5405-5-git-send-email-atull@opensource.altera.com> <20150724081829.GA16790@amd> User-Agent: Alpine 2.10 (DEB 1266 2009-07-14) MIME-Version: 1.0 Content-Type: text/plain; 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Yep > > > + Valid states may vary by manufacturer; superset is: > > + * unknown = can't determine state > > + * power off = FPGA power is off > > + * power up = FPGA reports power is up > > + * reset = FPGA held in reset state > > + * firmware request = firmware class request in progress > > + * firmware request error = firmware request failed > > + * write init = FPGA being prepared for programming > > + * write init error = Error while preparing FPGA for > > + programming > > + * write = FPGA ready to receive image data > > + * write error = Error while programming > > + * write complete = Doing post programming steps > > + * write complete error = Error while doing post programming > > + * operating = FPGA is programmed and operating > If I can make my intent clear, maybe we can figure out what will be most useful here. The intent is to provide enough detail that if something goes wrong with the FPGA programming (something that the driver can't take care of) then userspace can know that. Such as if the firmware request fails, that could be due to not being able to find the firmware file. > This will need some more details. "firmware request" is hardly a > hardware state, does it belong here? This is a superset of FPGA states and fpga manager driver states as the fpga manager driver is walking through the steps to get the FPGA into a known operating state. So it's a sequence, though some steps may get skipped. If there is an error, then userspace can know what step failed. Maybe this should be separated into fpga_state for hardware state and fpga_mgr_status (to report what step of progress the fpga manager driver is at during programming). I want this to be useful and still not be device (FPGA) specific. > Is power off or on while firmware > is being requested? On. It's a sequence. > How does the fpga get into power up phase? > Normally, you'd only power it on to do something more with it...? > > Pavel > > -- > (english) http://www.livejournal.com/~pavelmachek > (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/