Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754097AbbGXX1W (ORCPT ); Fri, 24 Jul 2015 19:27:22 -0400 Received: from mail-bl2on0053.outbound.protection.outlook.com ([65.55.169.53]:23296 "EHLO na01-bl2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751824AbbGXX1U convert rfc822-to-8bit (ORCPT ); Fri, 24 Jul 2015 19:27:20 -0400 From: "Chalamarla, Tirumalesh" To: Mark Rutland CC: "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "iommu@lists.linux-foundation.org" , linux-arm-kernel , Will Deacon , Marc Zyngier , "robin.murphy@arm.com" , "lorenzo.pieralisi@arm.com" , Arnd Bergmann , "treding@nvidia.com" , "Daney, David" , "majun258@huawei.com" , "thunder.leizhen@huawei.com" , "Chalamarla, Tirumalesh" , "laurent.pinchart@ideasonboard.com" Subject: Re: [PATCH 2/3] Docs: dt: Add PCI MSI map bindings Thread-Topic: [PATCH 2/3] Docs: dt: Add PCI MSI map bindings Thread-Index: AQHQxWgub45wvxOkr0G63FvqTB4SRZ3rRbuA Date: Fri, 24 Jul 2015 23:27:17 +0000 Message-ID: References: <1437670365-20704-1-git-send-email-mark.rutland@arm.com> <1437670365-20704-3-git-send-email-mark.rutland@arm.com> In-Reply-To: <1437670365-20704-3-git-send-email-mark.rutland@arm.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: arm.com; dkim=none (message not signed) header.d=none; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [64.2.3.194] x-microsoft-exchange-diagnostics: 1;BLUPR0701MB1778;5:6A0LQwmIr5zd5lnP7K4ZUTLLz6D5hirRb9fKKV1Cg/9JnGNIcfGR+gIczrPI1rHuUws4RGXhE+QDCmTB1bsQenaRS+qC8L6gRjgiq/9rzJ8LrTZnc2zRij5TFUJc2m3O+cJnA4zZTKwzsagqjQfzUg==;24:XF/FDEQT5i4defud3mqpGVSE+dc1AaaCFXJU0Fz7BPoVf7KprPCySwABfHpACaRtpZkol81H7jH6x8KRoU72qjJnXTzblMd5PnDYLVqL2LY=;20:hLsKtKV59IPper0nCt9t/XHOb3HUpvxetm+MJbayGRyZ73gDd7ipUTBUfqpkChhnzvLDtcXDip1Mm/SKakOR3A== x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BLUPR0701MB1778; blupr0701mb1778: X-MS-Exchange-Organization-RulesExecuted x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:; x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(601004)(5005006)(3002001);SRVR:BLUPR0701MB1778;BCL:0;PCL:0;RULEID:;SRVR:BLUPR0701MB1778; x-forefront-prvs: 0647963F84 x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(6009001)(164054003)(377454003)(24454002)(106116001)(2900100001)(2950100001)(40100003)(36756003)(77156002)(110136002)(92566002)(33656002)(189998001)(46102003)(122556002)(50986999)(83716003)(54356999)(82746002)(87936001)(5002640100001)(102836002)(19580395003)(76176999)(99286002)(19580405001)(2656002)(86362001)(5001960100002)(66066001)(77096005)(104396002)(217873001);DIR:OUT;SFP:1101;SCL:1;SRVR:BLUPR0701MB1778;H:BLUPR0701MB1780.namprd07.prod.outlook.com;FPR:;SPF:None;MLV:sfv;LANG:en; Content-Type: text/plain; charset="us-ascii" Content-ID: <5660608F853E9B45AF76AE9C96581B64@namprd07.prod.outlook.com> Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-originalarrivaltime: 24 Jul 2015 23:27:17.4802 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 711e4ccf-2e9b-4bcf-a551-4094005b6194 X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLUPR0701MB1778 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 7657 Lines: 267 looks good. possible to describe the chip we have. > On Jul 23, 2015, at 9:52 AM, Mark Rutland wrote: > > Currently msi-parent is used by a few bindings to describe the > relationship between a PCI root complex and a single MSI controller, but > this property does not have a generic binding document. > > Additionally, msi-parent is insufficient to describe more complex > relationships between MSI controllers and devices under a root complex, > where devices may be able to target multiple MSI controllers, or where > MSI controllers use (non-probeable) sideband information to distinguish > devices. > > This patch adds a generic binding for mapping PCI devices to MSI > controllers. This document covers msi-parent, and a new msi-map property > (specific to PCI*) which may be used to map devices (identified by their > Requester ID) to sideband data for each MSI controller that they may > target. > > Signed-off-by: Mark Rutland > --- > Documentation/devicetree/bindings/pci/pci-msi.txt | 220 ++++++++++++++++++++++ > 1 file changed, 220 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/pci-msi.txt > > diff --git a/Documentation/devicetree/bindings/pci/pci-msi.txt b/Documentation/devicetree/bindings/pci/pci-msi.txt > new file mode 100644 > index 0000000..9b3cc81 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pci/pci-msi.txt > @@ -0,0 +1,220 @@ > +This document describes the generic device tree binding for describing the > +relationship between PCI devices and MSI controllers. > + > +Each PCI device under a root complex is uniquely identified by its Requester ID > +(AKA RID). A Requester ID is a triplet of a Bus number, Device number, and > +Function number. > + > +For the purpose of this document, when treated as a numeric value, a RID is > +formatted such that: > + > +* Bits [15:8] are the Bus number. > +* Bits [7:3] are the Device number. > +* Bits [2:0] are the Function number. > +* Any other bits required for padding must be zero. > + > +MSIs may be distinguished in part through the use of sideband data accompanying > +writes. In the case of PCI devices, this sideband data may be derived from the > +Requester ID. A mechanism is required to associate a device with both the MSI > +controllers it can address, and the sideband data that will be associated with > +its writes to those controllers. > + > +For generic MSI bindings, see > +Documentation/devicetree/bindings/interrupt-controller/msi.txt. > + > + > +PCI root complex > +================ > + > +Optional properties > +------------------- > + > +- msi-map: Maps a Requester ID to an MSI controller and associated > + msi-specifier data. The property is an arbitrary number of tuples of > + (rid-base,msi-controller,msi-base,length), where: > + > + * rid-base is a single cell describing the first RID matched by the entry. > + > + * msi-controller is a single phandle to an MSI controller > + > + * msi-base is an msi-specifier describing the msi-specifier produced for the > + first RID matched by the entry. > + > + * length is a single cell describing how many consecutive RIDs are matched > + following the rid-base. > + > + Any RID r in the interval [rid-base, rid-base + length) is associated with > + the listed msi-controller, with the msi-specifier (r - rid-base + msi-base). > + > +- msi-map-mask: A mask to be applied to each Requester ID prior to being mapped > + to an msi-specifier per the msi-map property. > + > +- msi-parent: Describes the MSI parent of the root complex itself. Where > + the root complex and MSI controller do not pass sideband data with MSI > + writes, this property may be used to describe the MSI controller(s) > + used by PCI devices under the root complex, if defined as such in the > + binding for the root complex. > + > + > +Example (1) > +=========== > + > +/ { > + #address-cells = <1>; > + #size-cells = <1>; > + > + msi: msi-controller@a { > + reg = <0xa 0x1>; > + compatible = "vendor,some-controller"; > + msi-controller; > + #msi-cells = <1>; > + }; > + > + pci: pci@f { > + reg = <0xf 0x1>; > + compatible = "vendor,pcie-root-complex"; > + device_type = "pci"; > + > + /* > + * The sideband data provided to the MSI controller is > + * the RID, identity-mapped. > + */ > + msi-map = <0x0 &msi_a 0x0 0x10000>, > + }; > +}; > + > + > +Example (2) > +=========== > + > +/ { > + #address-cells = <1>; > + #size-cells = <1>; > + > + msi: msi-controller@a { > + reg = <0xa 0x1>; > + compatible = "vendor,some-controller"; > + msi-controller; > + #msi-cells = <1>; > + }; > + > + pci: pci@f { > + reg = <0xf 0x1>; > + compatible = "vendor,pcie-root-complex"; > + device_type = "pci"; > + > + /* > + * The sideband data provided to the MSI controller is > + * the RID, masked to only the device and function bits. > + */ > + msi-map = <0x0 &msi_a 0x0 0x100>, > + msi-map-mask = <0xff> > + }; > +}; > + > + > +Example (3) > +=========== > + > +/ { > + #address-cells = <1>; > + #size-cells = <1>; > + > + msi: msi-controller@a { > + reg = <0xa 0x1>; > + compatible = "vendor,some-controller"; > + msi-controller; > + #msi-cells = <1>; > + }; > + > + pci: pci@f { > + reg = <0xf 0x1>; > + compatible = "vendor,pcie-root-complex"; > + device_type = "pci"; > + > + /* > + * The sideband data provided to the MSI controller is > + * the RID, but the high bit of the bus number is > + * ignored. > + */ > + msi-map = <0x0000 &msi 0x0000 0x8000>, > + <0x8000 &msi 0x0000 0x8000>; > + }; > +}; > + > + > +Example (4) > +=========== > + > +/ { > + #address-cells = <1>; > + #size-cells = <1>; > + > + msi: msi-controller@a { > + reg = <0xa 0x1>; > + compatible = "vendor,some-controller"; > + msi-controller; > + #msi-cells = <1>; > + }; > + > + pci: pci@f { > + reg = <0xf 0x1>; > + compatible = "vendor,pcie-root-complex"; > + device_type = "pci"; > + > + /* > + * The sideband data provided to the MSI controller is > + * the RID, but the high bit of the bus number is > + * negated. > + */ > + msi-map = <0x0000 &msi 0x8000 0x8000>, > + <0x8000 &msi 0x0000 0x8000>; > + }; > +}; > + > + > +Example (5) > +=========== > + > +/ { > + #address-cells = <1>; > + #size-cells = <1>; > + > + msi_a: msi-controller@a { > + reg = <0xa 0x1>; > + compatible = "vendor,some-controller"; > + msi-controller; > + #msi-cells = <1>; > + }; > + > + msi_b: msi-controller@b { > + reg = <0xb 0x1>; > + compatible = "vendor,some-controller"; > + msi-controller; > + #msi-cells = <1>; > + }; > + > + msi_c: msi-controller@c { > + reg = <0xc 0x1>; > + compatible = "vendor,some-controller"; > + msi-controller; > + #msi-cells = <1>; > + }; > + > + pci: pci@c { > + reg = <0xf 0x1>; > + compatible = "vendor,pcie-root-complex"; > + device_type = "pci"; > + > + /* > + * The sideband data provided to MSI controller a is the > + * RID, but the high bit of the bus number is negated. > + * The sideband data provided to MSI controller b is the > + * RID, identity-mapped. > + * MSI controller c is not addressable. > + */ > + msi-map = <0x0000 &msi_a 0x8000 0x08000>, > + <0x8000 &msi_a 0x0000 0x08000>, > + <0x0000 &msi_b 0x0000 0x10000>; > + }; they can be identical right? like <0x8000 &msi_a 0x0000 0x08000>, <0x8000 &msi_b 0x0000 0x08000>; Thanks, Tirumalesh. > +}; > -- > 1.9.1 > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/