Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753422AbbG1OYY (ORCPT ); Tue, 28 Jul 2015 10:24:24 -0400 Received: from mail-bl2on0101.outbound.protection.outlook.com ([65.55.169.101]:17584 "EHLO na01-bl2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750883AbbG1OYW (ORCPT ); Tue, 28 Jul 2015 10:24:22 -0400 From: Shenwei Wang To: Shawn Guo CC: "jason@lakedaemon.net" , Huang Anson , "linux-kernel@vger.kernel.org" , "tglx@linutronix.de" , "shawn.guo@linaro.org" , "linux-arm-kernel@lists.infradead.org" Subject: RE: [PATCH v6 1/2] irqchip: imx-gpcv2: IMX GPCv2 driver for wakeup sources Thread-Topic: [PATCH v6 1/2] irqchip: imx-gpcv2: IMX GPCv2 driver for wakeup sources Thread-Index: AQHQxKFBE7T9qugVyk2pPJOxP2xAkJ3vWnoAgAAFd/CAAAmzgIAAAPnwgACqK4CAAN0s0A== Date: Tue, 28 Jul 2015 14:24:20 +0000 Message-ID: References: <1437584859-64203-1-git-send-email-shenwei.wang@freescale.com> <1437584859-64203-2-git-send-email-shenwei.wang@freescale.com> <20150727134058.GL12927@tiger> <20150727143515.GQ12927@tiger> <20150728004746.GT12927@tiger> In-Reply-To: <20150728004746.GT12927@tiger> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: kernel.org; dkim=none (message not signed) header.d=none; x-originating-ip: [192.88.168.50] x-microsoft-exchange-diagnostics: 1;BLUPR03MB1361;5:rhIuW/oNmRvVppOGFCcRfB99TllkdGaGvjfdQe9I+VrCgi0wslQMSxZQeRj3ZDASeeHsCQUwtM4GFuKstsA9IF86j/2FJ5jfrvhK5TqLE6ufhCG+DyljkmxPRTn5uRcRQuJF6MI3N8ohiNBFjzoUcQ==;24:L9oPSAMWkMxCPL9+LIjFF2fJgZ6gLdPaGCaczFFbNNuUejNACbMhRrTiUrt7/qxkQy0DepnAXSFY/I4q6Rofcw4ZAgYG4M9HwI45QSTQYAM=;20:6lN8ySM64D/3yoDGCKhF+32XsVVA5Gq7EIKVYj5Y6ygFzDRPf6P+iMDEaVSqHhCM2uNJOZ6ASJaux+iM7G0Lrw== x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BLUPR03MB1361; blupr03mb1361: X-MS-Exchange-Organization-RulesExecuted x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:; x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(601004)(5005006)(3002001);SRVR:BLUPR03MB1361;BCL:0;PCL:0;RULEID:;SRVR:BLUPR03MB1361; x-forefront-prvs: 06515DA04B x-forefront-antispam-report: SFV:NSPM;SFS:(10019020)(6009001)(24454002)(13464003)(77096005)(76576001)(102836002)(2950100001)(2900100001)(99286002)(46102003)(93886004)(86362001)(110136002)(76176999)(106116001)(5003600100002)(5001960100002)(50986999)(54356999)(74316001)(87936001)(19580395003)(92566002)(33656002)(77156002)(19580405001)(2656002)(62966003)(189998001)(40100003)(122556002)(66066001)(5002640100001);DIR:OUT;SFP:1102;SCL:1;SRVR:BLUPR03MB1361;H:CY1PR0301MB0843.namprd03.prod.outlook.com;FPR:;SPF:None;MLV:sfv;LANG:en; Content-Type: text/plain; charset="gb2312" MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-originalarrivaltime: 28 Jul 2015 14:24:20.2647 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLUPR03MB1361 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id t6SEOT8d018705 Content-Length: 1684 Lines: 53 > -----Original Message----- > From: Shawn Guo [mailto:shawnguo@kernel.org] > Sent: 2015??7??27?? 19:48 > To: Wang Shenwei-B38339 > Cc: jason@lakedaemon.net; Huang Yongcai-B20788; > linux-kernel@vger.kernel.org; tglx@linutronix.de; shawn.guo@linaro.org; > linux-arm-kernel@lists.infradead.org > Subject: Re: [PATCH v6 1/2] irqchip: imx-gpcv2: IMX GPCv2 driver for wakeup > sources > > On Mon, Jul 27, 2015 at 02:50:15PM +0000, Shenwei Wang wrote: > > The following structure is currently used in both drivers. The members > > "gpc_base/ wakeup_sources/enabled_irqs" are now shared to PM driver. > > And the macro IMR_NUM will be referred by both drivers too. > > > > struct imx_gpcv2_irq { > > spinlock_t lock; > > void __iomem *gpc_base; > > So this is the virtual base used by both irqchip and pm driver, and the lock is for > register access protection, right? If so, we can define gpc as a syscon device, > and access it from both drivers with regmap. Regmap can be a solution too. > > u32 wakeup_sources[IMR_NUM]; > > This should be an irqchip internal data and exported to external users like pm > code with an interface like imx_gpcv2_get_wakeup_sources(). Okay. > > u32 enabled_irqs[IMR_NUM]; > I do not see how this is used in pm driver. > > > u32 cpu2wakeup; > > The only use of this in pm driver is to unmask interrupt #32 during initialization. > Why cannot it be done in irqchip driver initialization? Right. This line should be moved to irqchip driver. Thanks. Shenwei > Shawn > > > }; ????{.n?+???????+%?????ݶ??w??{.n?+????{??G?????{ay?ʇڙ?,j??f???h?????????z_??(?階?ݢj"???m??????G????????????&???~???iO???z??v?^?m???? ????????I?