Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1947590AbbGaV0H (ORCPT ); Fri, 31 Jul 2015 17:26:07 -0400 Received: from mail-bl2on0100.outbound.protection.outlook.com ([65.55.169.100]:26999 "EHLO na01-bl2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1946573AbbGaV0B (ORCPT ); Fri, 31 Jul 2015 17:26:01 -0400 Authentication-Results: spf=fail (sender IP is 66.35.236.227) smtp.mailfrom=opensource.altera.com; arm.com; dkim=none (message not signed) header.d=none; Authentication-Results: pengutronix.de; dkim=none (message not signed) header.d=none; From: To: CC: , , , , , , , , , Dinh Nguyen Subject: [PATCHv2 3/4] reset: socfpga: Update reset-socfpga to read the altr,modrst-offset property Date: Fri, 31 Jul 2015 16:03:10 -0500 Message-ID: <1438376591-22100-4-git-send-email-dinguyen@opensource.altera.com> X-Mailer: git-send-email 2.4.5 In-Reply-To: <1438376591-22100-1-git-send-email-dinguyen@opensource.altera.com> References: <1438376591-22100-1-git-send-email-dinguyen@opensource.altera.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [64.129.157.38] X-ClientProxiedBy: BLUPR05CA0048.namprd05.prod.outlook.com (10.141.20.18) To BY1PR03MB1371.namprd03.prod.outlook.com (25.162.109.29) X-Microsoft-Exchange-Diagnostics-untrusted: 1;BY1PR03MB1371;2:J9Wwduqx5w6U1emkFePz4WTiwcaENyeeJuAUMVuYbFr+oKeupBmbcThLB1AgskrPfwmp5y2syQc5tSQIyvrIAeZlIYdeJCu/KacDLb7/xslDYMnSUX+eKsIn0gL+2sL8zJpVtqdTyDwzkVqYj8KfetcmdV/61z57Xc8CciF7V/g=;3:Skq0/++0cesUGAonpPG2yzThXXmersIy1+8qRZ0TUEdHkRvlZ8jY+HbXpz8QT4Bb5Sq7yPardE1QX6KQilzU5xBU1JYo06l+/g6fkOZGK3BM6jUyAFJzN9VB6qV9ycjV5P9jGivqXyluri8gJrJT2A==;25:bTzG8ANBGIVE1ikQvukylih9YSxsSNFRoCZCpMVR1RODByiGenfBbv4+1oNmw9CRp3Uu/ZrvFJjJ97OIg3OqVN1XLxdVIYnvOmgXGO0w/xFe7l0/E6L05pcOakrrzSxVKtbg72rh8dpQwlZBUT8ZvRTyXf6VddF/auXJwu03QOiTLxVeg5lQwVmvFAGRttZUS4EZJd9EcRex/nD7OXK+bOVjF36TeB2QlXWqh+tzKB5bikJVRfrd5EdEN0RYadjDSDhPtgPkfqWXqZlYoW4aVg==;20:Y3FqgVJ8K257QTvMb24w5wITu7EZOTOVKEE59hC+JmAyUK8KOLV66r6JxoGEI1P2HRL+wRibt/oLeYXcF6Az7KzcWPM+p4VIPgaDxoo17HoTGyc6suERMqWlsOd0gxmlotc0p0Ups91fzZJK9R49xMAVACJmAC75DsN0baNDjVY= X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BY1PR03MB1371;UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BY1PR03MB1497; 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The 'altr,modrst-offset' property is the first register into the reset manager that is used for bringing peripherals out of reset. The driver assumes a modrst-offset of 0x10 in order to support legacy Cyclone5/Arria5 hardware. Signed-off-by: Dinh Nguyen --- v2: assume a modrst-offset of 0x10 if the property is not specified in order to support legacy boards that do not have the property. --- drivers/reset/reset-socfpga.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c index 0a8def3..1a6c5d6 100644 --- a/drivers/reset/reset-socfpga.c +++ b/drivers/reset/reset-socfpga.c @@ -24,11 +24,11 @@ #include #define NR_BANKS 4 -#define OFFSET_MODRST 0x10 struct socfpga_reset_data { spinlock_t lock; void __iomem *membase; + u32 modrst_offset; struct reset_controller_dev rcdev; }; @@ -45,8 +45,8 @@ static int socfpga_reset_assert(struct reset_controller_dev *rcdev, spin_lock_irqsave(&data->lock, flags); - reg = readl(data->membase + OFFSET_MODRST + (bank * NR_BANKS)); - writel(reg | BIT(offset), data->membase + OFFSET_MODRST + + reg = readl(data->membase + data->modrst_offset + (bank * NR_BANKS)); + writel(reg | BIT(offset), data->membase + data->modrst_offset + (bank * NR_BANKS)); spin_unlock_irqrestore(&data->lock, flags); @@ -67,8 +67,8 @@ static int socfpga_reset_deassert(struct reset_controller_dev *rcdev, spin_lock_irqsave(&data->lock, flags); - reg = readl(data->membase + OFFSET_MODRST + (bank * NR_BANKS)); - writel(reg & ~BIT(offset), data->membase + OFFSET_MODRST + + reg = readl(data->membase + data->modrst_offset + (bank * NR_BANKS)); + writel(reg & ~BIT(offset), data->membase + data->modrst_offset + (bank * NR_BANKS)); spin_unlock_irqrestore(&data->lock, flags); @@ -85,7 +85,7 @@ static int socfpga_reset_status(struct reset_controller_dev *rcdev, int offset = id % BITS_PER_LONG; u32 reg; - reg = readl(data->membase + OFFSET_MODRST + (bank * NR_BANKS)); + reg = readl(data->membase + data->modrst_offset + (bank * NR_BANKS)); return !(reg & BIT(offset)); } @@ -100,6 +100,8 @@ static int socfpga_reset_probe(struct platform_device *pdev) { struct socfpga_reset_data *data; struct resource *res; + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; /* * The binding was mainlined without the required property. @@ -120,6 +122,11 @@ static int socfpga_reset_probe(struct platform_device *pdev) if (IS_ERR(data->membase)) return PTR_ERR(data->membase); + if (of_property_read_u32(np, "altr,modrst-offset", &data->modrst_offset)) { + dev_warn(dev, "missing altr,modrst-offset property, assuming 0x10!\n"); + data->modrst_offset = 0x10; + } + spin_lock_init(&data->lock); data->rcdev.owner = THIS_MODULE; -- 2.4.5 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/