Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754503AbbHCRAx (ORCPT ); Mon, 3 Aug 2015 13:00:53 -0400 Received: from terminus.zytor.com ([198.137.202.10]:40112 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754414AbbHCRAs (ORCPT ); Mon, 3 Aug 2015 13:00:48 -0400 Date: Mon, 3 Aug 2015 09:59:25 -0700 From: tip-bot for Will Deacon Message-ID: Cc: linux-kernel@vger.kernel.org, peterz@infradead.org, mingo@kernel.org, will.deacon@arm.com, paulmck@linux.vnet.ibm.com, tglx@linutronix.de, scott.norton@hp.com, waiman.long@hp.com, dave@stgolabs.net, torvalds@linux-foundation.org, corbet@lwn.net, akpm@linux-foundation.org, hpa@zytor.com, doug.hatch@hp.com Reply-To: will.deacon@arm.com, paulmck@linux.vnet.ibm.com, peterz@infradead.org, mingo@kernel.org, linux-kernel@vger.kernel.org, doug.hatch@hp.com, torvalds@linux-foundation.org, hpa@zytor.com, akpm@linux-foundation.org, corbet@lwn.net, scott.norton@hp.com, waiman.long@hp.com, dave@stgolabs.net, tglx@linutronix.de In-Reply-To: <20150716151006.GH26390@arm.com> References: <20150716151006.GH26390@arm.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:locking/core] locking/Documentation: Clarify failed cmpxchg( ) memory ordering semantics Git-Commit-ID: ed2de9f74ecbbf3063d29b2334e7b455d7f35189 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3399 Lines: 81 Commit-ID: ed2de9f74ecbbf3063d29b2334e7b455d7f35189 Gitweb: http://git.kernel.org/tip/ed2de9f74ecbbf3063d29b2334e7b455d7f35189 Author: Will Deacon AuthorDate: Thu, 16 Jul 2015 16:10:06 +0100 Committer: Ingo Molnar CommitDate: Mon, 3 Aug 2015 10:57:09 +0200 locking/Documentation: Clarify failed cmpxchg() memory ordering semantics A failed cmpxchg does not provide any memory ordering guarantees, a property that is used to optimise the cmpxchg implementations on Alpha, PowerPC and arm64. This patch updates atomic_ops.txt and memory-barriers.txt to reflect this. Signed-off-by: Will Deacon Signed-off-by: Peter Zijlstra (Intel) Cc: Andrew Morton Cc: Davidlohr Bueso Cc: Douglas Hatch Cc: H. Peter Anvin Cc: Jonathan Corbet Cc: Linus Torvalds Cc: Paul E. McKenney Cc: Peter Zijlstra Cc: Scott J Norton Cc: Thomas Gleixner Cc: Waiman Long Link: http://lkml.kernel.org/r/20150716151006.GH26390@arm.com Signed-off-by: Ingo Molnar --- Documentation/atomic_ops.txt | 4 +++- Documentation/memory-barriers.txt | 6 +++--- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/Documentation/atomic_ops.txt b/Documentation/atomic_ops.txt index dab6da3..b19fc34 100644 --- a/Documentation/atomic_ops.txt +++ b/Documentation/atomic_ops.txt @@ -266,7 +266,9 @@ with the given old and new values. Like all atomic_xxx operations, atomic_cmpxchg will only satisfy its atomicity semantics as long as all other accesses of *v are performed through atomic_xxx operations. -atomic_cmpxchg must provide explicit memory barriers around the operation. +atomic_cmpxchg must provide explicit memory barriers around the operation, +although if the comparison fails then no memory ordering guarantees are +required. The semantics for atomic_cmpxchg are the same as those defined for 'cas' below. diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt index 13feb69..18fc860 100644 --- a/Documentation/memory-barriers.txt +++ b/Documentation/memory-barriers.txt @@ -2383,9 +2383,7 @@ about the state (old or new) implies an SMP-conditional general memory barrier explicit lock operations, described later). These include: xchg(); - cmpxchg(); atomic_xchg(); atomic_long_xchg(); - atomic_cmpxchg(); atomic_long_cmpxchg(); atomic_inc_return(); atomic_long_inc_return(); atomic_dec_return(); atomic_long_dec_return(); atomic_add_return(); atomic_long_add_return(); @@ -2398,7 +2396,9 @@ explicit lock operations, described later). These include: test_and_clear_bit(); test_and_change_bit(); - /* when succeeds (returns 1) */ + /* when succeeds */ + cmpxchg(); + atomic_cmpxchg(); atomic_long_cmpxchg(); atomic_add_unless(); atomic_long_add_unless(); These are used for such things as implementing ACQUIRE-class and RELEASE-class -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/