Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755709AbbHDIya (ORCPT ); Tue, 4 Aug 2015 04:54:30 -0400 Received: from terminus.zytor.com ([198.137.202.10]:50031 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755671AbbHDIyY (ORCPT ); Tue, 4 Aug 2015 04:54:24 -0400 Date: Tue, 4 Aug 2015 01:53:54 -0700 From: tip-bot for Kan Liang Message-ID: Cc: mingo@kernel.org, peterz@infradead.org, kan.liang@intel.com, torvalds@linux-foundation.org, linux-kernel@vger.kernel.org, tglx@linutronix.de, hpa@zytor.com Reply-To: linux-kernel@vger.kernel.org, tglx@linutronix.de, hpa@zytor.com, kan.liang@intel.com, mingo@kernel.org, peterz@infradead.org, torvalds@linux-foundation.org In-Reply-To: <1435170215-5017-1-git-send-email-kan.liang@intel.com> References: <1435170215-5017-1-git-send-email-kan.liang@intel.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:perf/core] perf/x86/intel: Fix SLM MSR_OFFCORE_RSP1 valid_mask Git-Commit-ID: ae3f011fc25104a218caf4448b1d47ef1c9b3a42 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2788 Lines: 80 Commit-ID: ae3f011fc25104a218caf4448b1d47ef1c9b3a42 Gitweb: http://git.kernel.org/tip/ae3f011fc25104a218caf4448b1d47ef1c9b3a42 Author: Kan Liang AuthorDate: Wed, 24 Jun 2015 11:23:35 -0700 Committer: Ingo Molnar CommitDate: Tue, 4 Aug 2015 10:16:54 +0200 perf/x86/intel: Fix SLM MSR_OFFCORE_RSP1 valid_mask AVG_LATENCY(bit 38) is only available on MSR_OFFCORE_RSP0. So the bit should be removed from RSP1 valid_mask. Since RSP0 and RSP1 may have different valid_mask, intel_alt_er should validate the config on the alternate offcore reg before replacing it. Signed-off-by: Kan Liang Signed-off-by: Peter Zijlstra (Intel) Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Link: http://lkml.kernel.org/r/1435170215-5017-1-git-send-email-kan.liang@intel.com Signed-off-by: Ingo Molnar --- arch/x86/kernel/cpu/perf_event_intel.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index b9826a9..71815cf 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c @@ -1114,7 +1114,7 @@ static struct extra_reg intel_slm_extra_regs[] __read_mostly = { /* must define OFFCORE_RSP_X first, see intel_fixup_er() */ INTEL_UEVENT_EXTRA_REG(0x01b7, MSR_OFFCORE_RSP_0, 0x768005ffffull, RSP_0), - INTEL_UEVENT_EXTRA_REG(0x02b7, MSR_OFFCORE_RSP_1, 0x768005ffffull, RSP_1), + INTEL_UEVENT_EXTRA_REG(0x02b7, MSR_OFFCORE_RSP_1, 0x368005ffffull, RSP_1), EVENT_EXTRA_END }; @@ -1699,18 +1699,22 @@ intel_bts_constraints(struct perf_event *event) return NULL; } -static int intel_alt_er(int idx) +static int intel_alt_er(int idx, u64 config) { + int alt_idx; if (!(x86_pmu.flags & PMU_FL_HAS_RSP_1)) return idx; if (idx == EXTRA_REG_RSP_0) - return EXTRA_REG_RSP_1; + alt_idx = EXTRA_REG_RSP_1; if (idx == EXTRA_REG_RSP_1) - return EXTRA_REG_RSP_0; + alt_idx = EXTRA_REG_RSP_0; - return idx; + if (config & ~x86_pmu.extra_regs[alt_idx].valid_mask) + return idx; + + return alt_idx; } static void intel_fixup_er(struct perf_event *event, int idx) @@ -1799,7 +1803,7 @@ again: */ c = NULL; } else { - idx = intel_alt_er(idx); + idx = intel_alt_er(idx, reg->config); if (idx != reg->idx) { raw_spin_unlock_irqrestore(&era->lock, flags); goto again; -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/