Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751583AbbHEGqc (ORCPT ); Wed, 5 Aug 2015 02:46:32 -0400 Received: from metis.ext.pengutronix.de ([92.198.50.35]:49911 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750997AbbHEGqa (ORCPT ); Wed, 5 Aug 2015 02:46:30 -0400 Date: Wed, 5 Aug 2015 08:46:05 +0200 From: Sascha Hauer To: James Liao Cc: Matthias Brugger , Mike Turquette , Stephen Boyd , Heiko Stubner , devicetree@vger.kernel.org, srv_heupstream@mediatek.com, linux-kernel@vger.kernel.org, Daniel Kurtz , Ricky Liang , Rob Herring , linux-mediatek@lists.infradead.org, Sascha Hauer , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v6 7/9] clk: mediatek: Add subsystem clocks of MT8173 Message-ID: <20150805064605.GZ18700@pengutronix.de> References: <1438676218-11310-1-git-send-email-jamesjj.liao@mediatek.com> <1438676218-11310-8-git-send-email-jamesjj.liao@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1438676218-11310-8-git-send-email-jamesjj.liao@mediatek.com> X-Sent-From: Pengutronix Hildesheim X-URL: http://www.pengutronix.de/ X-IRC: #ptxdist @freenode X-Accept-Language: de,en X-Accept-Content-Type: text/plain X-Uptime: 08:30:10 up 41 days, 51 min, 91 users, load average: 0.15, 0.11, 0.13 User-Agent: Mutt/1.5.21 (2010-09-15) X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c0 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2266 Lines: 46 On Tue, Aug 04, 2015 at 04:16:56PM +0800, James Liao wrote: > Most multimedia subsystem clocks will be accessed by multiple > drivers, so it's a better way to manage these clocks in CCF. > This patch adds clock support for MM, IMG, VDEC, VENC and VENC_LT > subsystems. > > Signed-off-by: James Liao > --- > drivers/clk/mediatek/clk-mt8173.c | 267 +++++++++++++++++++++++++++++++++ > include/dt-bindings/clock/mt8173-clk.h | 97 +++++++++++- > 2 files changed, 361 insertions(+), 3 deletions(-) > > diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c > index f37ace6..05335e5 100644 > --- a/drivers/clk/mediatek/clk-mt8173.c > +++ b/drivers/clk/mediatek/clk-mt8173.c > @@ -25,6 +25,10 @@ static DEFINE_SPINLOCK(mt8173_clk_lock); > static const struct mtk_fixed_clk fixed_clks[] __initconst = { > FIXED_CLK(CLK_TOP_CLKPH_MCK_O, "clkph_mck_o", "clk26m", 400 * MHZ), > FIXED_CLK(CLK_TOP_USB_SYSPLL_125M, "usb_syspll_125m", "clk26m", 125 * MHZ), > + FIXED_CLK(CLK_TOP_DSI0_DIG, "dsi0_dig", "clk26m", 130 * MHZ), > + FIXED_CLK(CLK_TOP_DSI1_DIG, "dsi1_dig", "clk26m", 130 * MHZ), > + FIXED_CLK(CLK_TOP_LVDS_PXL, "lvds_pxl", "lvdspll", 148.5 * MHZ), > + FIXED_CLK(CLK_TOP_LVDS_CTS, "lvds_cts", "lvdspll", 51.975 * MHZ), I would expect 51975 * KHZ here to avoid fractional numbers. Probably gcc calculates that during compile time so this will work as expected, still I'm not sure this is good style to use fractional numbers here. Anyway, on my system lvdspll is running at 150MHz. Are you sure there is a clock derived from this running at 148.5MHz? Is it really correct to use a fixed clock here or should it rather be lvdspll directly? Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/