Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752454AbbHEJMk (ORCPT ); Wed, 5 Aug 2015 05:12:40 -0400 Received: from foss.arm.com ([217.140.101.70]:32914 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750742AbbHEJMi (ORCPT ); Wed, 5 Aug 2015 05:12:38 -0400 Message-ID: <55C1D383.2060202@arm.com> Date: Wed, 05 Aug 2015 10:12:35 +0100 From: Marc Zyngier Organization: ARM Ltd User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Icedove/31.7.0 MIME-Version: 1.0 To: Anson Huang , "linux-kernel@vger.kernel.org" CC: "tglx@linutronix.de" , "jason@lakedaemon.net" , "rmk+kernel@arm.linux.org.uk" Subject: Re: [PATCH] irqchip/gic: restore global interrupts group settings in distributor References: <1438792778-7586-1-git-send-email-b20788@freescale.com> In-Reply-To: <1438792778-7586-1-git-send-email-b20788@freescale.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2022 Lines: 60 Hi Anson, On 05/08/15 17:39, Anson Huang wrote: > In GIC's distributor initializtion, all global interrupts > are set to group 1, however, after suspend/resume with > ARM/GIC power off/on, distributor does NOT restore > these global interrupts group setting, it will cause > system fail to resume. > > This patch adds global interrupts group setting restore > for distributor. > > Signed-off-by: Anson Huang > --- > drivers/irqchip/irq-gic.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c > index a530d9a..c8fa6ee 100644 > --- a/drivers/irqchip/irq-gic.c > +++ b/drivers/irqchip/irq-gic.c > @@ -532,6 +532,16 @@ static void gic_dist_restore(unsigned int gic_nr) > writel_relaxed(gic_data[gic_nr].saved_spi_enable[i], > dist_base + GIC_DIST_ENABLE_SET + i * 4); > > + writel_relaxed(GICD_ENABLE_GRP1, dist_base + GIC_DIST_CTRL); > + > + /* > + * Optionally set all global interrupts to be group 1. > + */ > + if (readl_relaxed(dist_base + GIC_DIST_CTRL) & GICD_ENABLE_GRP1) { > + for (i = 32; i < gic_irqs; i += 32) > + writel_relaxed(0xffffffff, dist_base + GIC_DIST_IGROUP + i * 4 / 32); > + } > + > writel_relaxed(GICD_ENABLE | GICD_ENABLE_GRP1, dist_base + GIC_DIST_CTRL); > } > > I'm afraid you'll have to explain a few more things here. For GICv1/v2, we exclusively use Group0 interrupts when booted in secure mode (i.e. we don't use FIQ yet, but RMK and Daniel Thompson have patches for that). When booted in non-secure, the group configuration is not accessible (it is secure only). So the first case is not applicable yet, and the second one is not possible. Which side are you on? Thanks, M. -- Jazz is not dead. It just smells funny... -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/