Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755380AbbHFLAo (ORCPT ); Thu, 6 Aug 2015 07:00:44 -0400 Received: from mezzanine.sirena.org.uk ([106.187.55.193]:58558 "EHLO mezzanine.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754865AbbHFLAl (ORCPT ); Thu, 6 Aug 2015 07:00:41 -0400 Date: Thu, 6 Aug 2015 12:00:18 +0100 From: Mark Brown To: Russell King - ARM Linux Cc: Michal Suchanek , "R, Vignesh" , devicetree , Brian Norris , Tony Lindgren , Linux Kernel Mailing List , linux-spi , Huang Shijie , MTD Maling List , linux-omap@vger.kernel.org, David Woodhouse , "linux-arm-kernel@lists.infradead.org" Message-ID: <20150806110018.GS20873@sirena.org.uk> References: <55BEF4AF.5090704@ti.com> <20150804155148.GR20873@sirena.org.uk> <55C0FD98.1090107@ti.com> <20150805115013.GJ20873@sirena.org.uk> <20150805124412.GN20873@sirena.org.uk> <20150806090202.GO20873@sirena.org.uk> <20150806102225.GI7576@n2100.arm.linux.org.uk> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="4dezoEM3dweX1vMa" Content-Disposition: inline In-Reply-To: <20150806102225.GI7576@n2100.arm.linux.org.uk> X-Cookie: Please take note: User-Agent: Mutt/1.5.23 (2014-03-12) X-SA-Exim-Connect-IP: 94.175.94.161 X-SA-Exim-Mail-From: broonie@sirena.org.uk Subject: Re: [RFC PATCH 1/5] spi: introduce flag for memory mapped read X-SA-Exim-Version: 4.2.1 (built Mon, 26 Dec 2011 16:24:06 +0000) X-SA-Exim-Scanned: Yes (on mezzanine.sirena.org.uk) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2473 Lines: 56 --4dezoEM3dweX1vMa Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Aug 06, 2015 at 11:22:25AM +0100, Russell King - ARM Linux wrote: > If that's the case, then maybe you should consider whether using the SPI > bus infrastructure is really the best way forward. Would it make more > sense instead to adopt a different software structure, something more > high-level like: > +-------------------------------------------+ > | m25p80 high-level driver | > +----------------------+--------------------+ > | SPI m25p80 driver | | > +----------------------+ | > | SPI layer | Special driver | > +----------------------+ | > | SPI bus driver | | > +----------------------+--------------------+ > | SPI hardware | Special hardware | > +----------------------+--------------------+ Yes, that's what's been talked about before - for some of these devices they're sufficiently flash specialist that we just don't bother exposing a SPI interface at all though AIUI they could be persuaded to do it. It isn't entirely clear that we want exactly that split, if the devices are reasonable SPI controllers we will want to handle the case where they have flash and non-flash devices on the same bus. For that there is going to be some generalisable work possible for managing switching between memory mapped and SPI modes where those are mutually exclusive, especially if the switch between them isn't free. --4dezoEM3dweX1vMa Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQEcBAEBCAAGBQJVwz5CAAoJECTWi3JdVIfQ6VAH/114XYi5VzW0D8sB+8ukrq/A bkJ/eHqojBMErmudkznI8zyirx0/R9p6sv3v8bz70HnNtQbBGNfUBX7o+fxaWnH2 tyXMxr1f51ZwKuZqJKritN/HZ1nN4N1JFgkfeYQm+KK+DoOVNj+AQAAhCrm2zvwi CrmTBcgupZYme/sRSm9kwf9lXcxUr3VFXoeHiHik4FN3Mbt7YxDvyxqz6H+fkEFn 6UWXSuEdg2O/SJ4x7MHH/GFehqCSwyHPzXwhbt+/oOR/r61xg/99VA4z3kWsImp+ yZBkUPWdS5ZR4a3HzswVt39/t7/utQ02GG4GL4gO5z4brnMN2hgmCI9v/v6Jja8= =JvaZ -----END PGP SIGNATURE----- --4dezoEM3dweX1vMa-- -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/