Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755394AbbHFLEq (ORCPT ); Thu, 6 Aug 2015 07:04:46 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:20367 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751142AbbHFLEo convert rfc822-to-8bit (ORCPT ); Thu, 6 Aug 2015 07:04:44 -0400 From: Govindraj Raja To: Paul Burton , "linux-mips@linux-mips.org" , "Ralf Baechle (ralf@linux-mips.org)" CC: "linux-kernel@vger.kernel.org" , James Hogan , Markos Chandras , Ralf Baechle Subject: RE: [PATCH 0/6] MIPS CPS SMP fixes, debug & cleanups Thread-Topic: [PATCH 0/6] MIPS CPS SMP fixes, debug & cleanups Thread-Index: AQHQz9AoStHQX3wXz0WEZqZBh8PF053+zoNQ Date: Thu, 6 Aug 2015 11:04:41 +0000 Message-ID: <4BF5E8683E87FC4DA89822A5A3EB60CB6F2122@hhmail02.hh.imgtec.org> References: <1438814560-19821-1-git-send-email-paul.burton@imgtec.com> In-Reply-To: <1438814560-19821-1-git-send-email-paul.burton@imgtec.com> Accept-Language: en-US Content-Language: en-AU X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [192.168.167.98] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1679 Lines: 42 Hi Paul / Rafl, > -----Original Message----- > From: linux-mips-bounce@linux-mips.org [mailto:linux-mips-bounce@linux- > mips.org] On Behalf Of Paul Burton > Sent: 05 August 2015 11:43 PM > To: linux-mips@linux-mips.org > Cc: Paul Burton; linux-kernel@vger.kernel.org; James Hogan; Markos Chandras; > Ralf Baechle > Subject: [PATCH 0/6] MIPS CPS SMP fixes, debug & cleanups > > This series fixes a few issues with the MIPS Coherent Processing System SMP > implementation, provides some extra capabilities with regards to debug and does > a little spring cleaning. A couple of the issues fixed were introduced in v4.1-rc1 > and (spuriously) marked for stable backports as far as v3.16, so the fixes in this > series are marked likewise. > > Applies atop v4.2-rc5. > > Paul Burton (6): > MIPS: CPS: use 32b accesses to GCRs > MIPS: CPS: stop dangling delay slot from has_mt > MIPS: CPS: don't include MT code in non-MT kernels > MIPS: CPS: #ifdef on CONFIG_MIPS_MT_SMP rather than CONFIG_MIPS_MT > MIPS: CONFIG_MIPS_MT_SMP should depend upon CPU_MIPSR2 > MIPS: CPS: drop .set mips64r2 directives > > arch/mips/Kconfig | 2 +- > arch/mips/kernel/cps-vec.S | 18 +++++++++--------- > 2 files changed, 10 insertions(+), 10 deletions(-) I just boot tested on Pistachio Platform (MIPS interAptiv (multi) (32)). Without this patch series boot is broken for pistachio platform for 4.2-rc5. -- Thanks, Govindraj.R -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/