Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755950AbbHFQ6P (ORCPT ); Thu, 6 Aug 2015 12:58:15 -0400 Received: from mail-lb0-f177.google.com ([209.85.217.177]:34499 "EHLO mail-lb0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754288AbbHFQ6N (ORCPT ); Thu, 6 Aug 2015 12:58:13 -0400 MIME-Version: 1.0 In-Reply-To: <20150806132926.GB19896@lunn.ch> References: <20150804153439.GA28673@lunn.ch> <20150805162155.GE32760@lunn.ch> <20150806132926.GB19896@lunn.ch> Date: Thu, 6 Aug 2015 22:28:12 +0530 Message-ID: Subject: Re: Armadaxp GPIO interrupts From: raghu MG To: Andrew Lunn Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Thomas Petazzoni , Sebastian Hesselbarth Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1863 Lines: 49 Ok,I think I need to understand more about this gpio driver. As you said its registering chained handler,but why are they(IRQs) not visible in cat /proc/interrupts. What could be the reason.? Do I need to further initialize marvell GPIO registers to trigger these events. The driver is unmasking all interrupts in probe function writel_relaxed(0, mvchip->membase + GPIO_EDGE_CAUSE_OFF); writel_relaxed(0, mvchip->membase + GPIO_EDGE_MASK_OFF); writel_relaxed(0, mvchip->membase + GPIO_LEVEL_MASK_OFF); Do I need to change the polarity in polarity register to suit the board requirements in probe function. I will try this in the morning. Regards Raghu On Thu, Aug 6, 2015 at 6:59 PM, Andrew Lunn wrote: >> mvebu_gpio_irq_handler is only called if I register a another handler >> at irq=82/83/84/85/87/88/89/90/92. I am registering this handler using >> minimal kernel module. > > This is totally wrong. The gpio driver needs these interrupts, and > will register a chained interrupt handle for these. Don't mess around > with them. Here is the code in the driver: > > /* Setup the interrupt handlers. Each chip can have up to 4 > * interrupt handlers, with each handler dealing with 8 GPIO > * pins. */ > for (i = 0; i < 4; i++) { > int irq = platform_get_irq(pdev, i); > > if (irq < 0) > continue; > irq_set_handler_data(irq, mvchip); > irq_set_chained_handler(irq, mvebu_gpio_irq_handler); > } > > Andrew -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/