Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752348AbbHLL2b (ORCPT ); Wed, 12 Aug 2015 07:28:31 -0400 Received: from smtp.gentoo.org ([140.211.166.183]:33560 "EHLO smtp.gentoo.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751611AbbHLL23 (ORCPT ); Wed, 12 Aug 2015 07:28:29 -0400 From: Alexis Ballier To: linux-samsung-soc@vger.kernel.org Cc: Alexis Ballier , linux-arm-kernel@lists.infradead.org, Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Kukjin Kim , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] ARM: dts: exynos4412-odroidu3: Enable SPI1. Date: Wed, 12 Aug 2015 13:27:51 +0200 Message-Id: <1439378871-28117-1-git-send-email-aballier@gentoo.org> X-Mailer: git-send-email 2.5.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 982 Lines: 32 SPI1 is available on IO Port #2 (as depicted on their website) in PCB Revision 0.5 of Hardkernel Odroid U3 board. The shield connects a 256KiB spi-nor flash on that bus. Signed-off-by: Alexis Ballier --- arch/arm/boot/dts/exynos4412-odroidu3.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts b/arch/arm/boot/dts/exynos4412-odroidu3.dts index 44684e5..37698e4 100644 --- a/arch/arm/boot/dts/exynos4412-odroidu3.dts +++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts @@ -61,3 +61,10 @@ "Speakers", "SPKL", "Speakers", "SPKR"; }; + +&spi_1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1_bus>; + cs-gpios = <&gpb 5 0>; + status = "okay"; +}; -- 2.5.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/